Lattice Semiconductor iCE40LP8K-USBC-EVN User Manual page 6

Figure 4 shows the DIP switch numbering and settings.
Figure 4. DIP Switch Numbering
(SW3)
Two positions of the DIP switch SW3 and the header J3 are used to control which devices and which mode the
FTDI Bridge utilizes. Table 2 provides the detailed definitions of the DIP switch settings required to program each
device.
Table 2. DIP Switch Settings to Program the Device
Device
MachXO2
iCE40 CRAM
iCE40 Flash
(All)
Note: The MachXO2 must be programmed with an image containing the SPI programming multiplexing and CRESET
level-shifting driver (for example, the default image asdf.jed) prior to programming or configuring the iCE40 devices or
their subtended SPI Flash devices.
SW3.1
SW3.2
SW3.3
SW3.4
SW3.5
SW3.6
SW3.7
SW3.8
SW3.9
SW3.10
Operation
Program/Configure
Program/Configure
Program/Configure
Boot
USB Type-C Demo Kit V2 Board
Jumper Position
Mode
J16
JTAG 1-2
SPI 1-2
SPI 1-2
— 3-2
6
J16
J3
DIPSW (SW3) Position
J3 SW3.1
3-2 Up
1-2 Down
1-2 Down
— Up
SW3.2
Down
Down
Up
Up