Lattice Semiconductor iCE40LP8K-USBC-EVN User Manual page 9

Table 5. Aggregator I/O Map for MachX02
MACHX02(U4)
I/O Ball Bank
F1
F2
F3
G3
H1
H2
H3
J1
B8
C8
A9
A7
The MachXO2-4000ZE and an iCE40LP8k/iCE5LP4K provides connections to the header J18 (Embedded control-
ler connector). Table 6 provides the detailed definition of the signals.
Table 6. AP Interface for MachXO2, iCE40LP/iCE5LP and J18
iCE40LP8K(U22)
IO Ball Bank
G7 SPI
G4 2
G6 SPI
H7 SPI
ICE40LP8K(U22)
I/O Ball
3 B6
3 A6
3 B5
3 A4
3 B4
3 D5
3 E5
3 A3
0 A8
0 B8
0 B7
0 A7
A2
A1
iCE5LP4K(U5)
IO Ball Bank
15 2
18 2
14 2
17 2
USB Type-C Demo Kit V2 Board
HD3SS460(U11)
Pin Number
Bank
0 —
0 —
0 —
0 —
0 —
0 —
0 —
0 —
0 —
0 —
0 —
0 —
0 13
0 14
XO2(U4)
IO Ball Bank
M7 2
N4 2
M9 2
M8 2
9
Schematic Net
AGG_GPIO1
AGG_GPIO2
AGG_GPIO3
AGG_GPIO4
AGG_GPIO5
AGG_GPIO6
AGG_GPIO7
AGG_GPIO8
SDA1
SCL1
SDA2
SCL2
AUX_CHP
AUX_CHN
Schematic Net
J18
Name
1 SPI_SCK
3 EC_CS
5 SPI_MISO
8 SPI_MOSI