Section2 - ICP DAS USA PCI-1002L User Manual

PCI-1002 Series Card
12-bit, 110 kS/s or 44 kS/s Multi-function Board

6.2.2 Section2

This section is used by the add-on control logic. 64 bytes of I/O locations are used. Detailed
descriptions are shown below.
6.2.2.1 The 8254 Registers
The 8254, programmable timer/counter is used to generate periodic AD trigger signals, periodic
interrupt signals and the machine- independent timer for PCI-1002. Addresses 00h, 04h, 08h and
0Ch are used to control the 8254.
Timer 0 is used as Pacer 0. Timer 1 is used as Pacer 1. Timer 2 is used as a machine-independent
timer, P1002_Dealy(). For more details about the programming information, please refer to Intel's
"Microsystem Components Handbook".
6.2.2.2 The DI/DO Registers
Address 20h is used for DI / DO ports. Writing to this port will write data to DO register. Reading
from this port will read the data from DI.
6.2.2.3 The AD Buffer
Address 30h is used for AD buffer. Only read operations are available at this address. Reading from
this port will read the data from AD buffer. The format of AD buffer is:
Bit 15 - Bit 12 Bit 11 - Bit 0
Analog Input Channel AD Data
Bit 15-12: The channel number of analog input. Only the lower 4 bits of the channel number are
shown in this register.
Bit 11-0: The AD data.
User Manual, Ver. 3.0, Jun. 2018, PMH-015-30, Page: 47