Emerson SI-Universal User Manual page 89

Figure 7-6 SSI data alignment
P1 Revolution / Pole
Pitch Counter (1x.028)
Encoder Simulation SSI
Turns Bits (1x.096) = 8
The SSI output is then clocked out from the register as shown in Figure 7-7.
Figure 7-7 Example showing 15 data bits
Clock from
master
Encoder
15
simulation data
MS bit
It should be noted that the data is shifted out by a clock that is produced by the SSI master
connected to the encoder simulation interface as the interface is emulating an SSI encoder.
However, unlike an SSI encoder the position data is not sampled on the first edge of the clock, but
is updated by the drive at the rate defined by Encoder Simulation Sample Period (1x.087) . If the P1
position interface is being used as the source the power supply alarm bit (PS) is the inverse of the
initialized flag in Position Feedback Initialized (1x.076) related to this interface. The master can
clock out as many bits of data as required, but once the power supply alarm bit has been produced
the output will remain low. The SSI interface reset time (tm) of 20 µs is required so that the interface
can detect the end of the transmission and reset itself so that the output data begins again at the
most significant bit. During this period the master should hold the clock line high. The master
should not use a clock frequency of less than 50 kHz or else spurious reset periods may be
detected.
If any other parameter is used as the source the most significant M bits of the source parameter are
used, where M = Encoder Simulation SSI Comms Bits (1x.097) - 1. If the source parameter has
less than M bits then trailing zeros are added. The power supply alarm bit is always zero in this
mode.
SI-Universal Encoder User Guide
Issue: 2
P1 Position (1x.029)
8
Encoder Simulation SSI
Comms Bits (1x.097) = 27
Example of SSI data set -up from P 1 position feedback interface
14 13 12 11 10 9
SSI encoder simulation output
P1 Fine Position
(1x.030)
16 2
8 7 6 5 4 3
Power supply alarm bit
2 1 0 PS
tm
89