Emerson SI-Universal User Manual page 69

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1. If the terminations are not enabled on the A1, B1 or Z1 inputs, the wire break system will not
operate. (Note that as default the Z1 input terminations are disabled to disable wire break
detection on this input.)
2. Phase error detection for AB Servo, FD Servo, FR Servo or SC Servo encoders monitors the
relationship between the position from the incremental signals and the commutation signals to
ensure that the incremental pulses have been counted correctly. The error is detected if the
incremental position moves by 10° electrical with respect to the position defined by the UVW
commutation signals. The trip is initiated if the error is detected for 10 consecutive samples
taken once every 100 ms. This system should not be used unless 10° electrical is less than one
encoder line (AB Servo), or two lines (FD Servo, FR Servo), or one sine wave (SC Servo) or
else spurious UVW phase P1 trips will occur.
3. Phase error detection for SINCOS encoders with comms monitors the relationship between the
position derived from the sine waves with the position derived via comms. The encoder is
interrogated via comms and the comparison is made once per second. If the error is greater
than 10° electrical for 10 consecutive samples the trip is initiated. This system should not be
used unless 10° electrical is less than one sine wave or else spurious Phase offset P1 trips will
occur.
Wire-break detection
It may be important to detect a break in the connections between the drive and the position
feedback device. This feature is provided for most position feedback devices either directly or
indirectly as detailed in the table below.
Table 7-4 Wire-break detection
Device
AB, FD, FR, AB Servo, FD
Servo, FR Servo
SC, SC Servo, SC Hiperface,
SC EnData, SC SSI
SC Hiperface, SC EnDat,
EnDat, BiSS*
SSI, SC SSI
* BiSS is not currently supported.
SI-Universal Encoder User Guide
Issue: 2
Detection method
Hardware detectors on the A1, B1 and Z1 signal
detect a wire break.
The magnitudes of the sine wave signals are
2
monitored and if Sine
+Cosine
value produced by two valid waveforms with a
differential peak to peak magnitude of 0.25V (¼
of the nominal level) then a trip is initiated. This
detects wire break in the sine and cosine
connections.
Wire break in the comms link is detected by a
CRC or timeout error.
Wire break detection in the comms is difficult
with these devices. However, if power supply
alarm bit monitoring is enabled, the drive will be
looking for a one at the start of the message and
a zero to indicate that the power supply is
operational. If the clock stops or the data line is
disconnected, the data input to the drive may
stay in one state or the other and cause a trip.
Trip produced
Wire break A P1
Wire break B P1
Wire break Z P1
2
is less than the
Wire break P1
Comms error P1
SSI error P1
69

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