Hardware Layout And Configuration; Figure 2. Hardware Block Diagram - ST STM3210E-EVAL User Manual

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Hardware layout and configuration

The STM3210E-EVAL evaluation board is designed around the STM32F103ZGT6
microcontroller in a 144-pin TQFP package. The hardware block diagram
illustrates the connections between the STM32F103ZGT6 and peripherals (LCD, SPI Flash,
USART, IrDA, USB, audio, CAN bus, smartcard, MicroSD Card, NOR Flash, NAND Flash,
SRAM, temperature sensor, audio DAC and motor control) and
these features on the actual evaluation board.
3.3 V regulator
512 K x 16 SRAM
1 Gbit NAND
128 Mbit NOR
TFT LCD
64 Mbit / 128 Mbit
serial Flash
MC control
connector
MicroSD card
Temperature sensor

Figure 2. Hardware block diagram

FSMC
SPI1
MC
SDIO
I2C
JTAG
Debug
Trace
I2S
GPIO
STM32103Z
USART 1
USART 2
USART 4
USART 3
CAN
ADC
USB
DocID14220 Rev 6
Hardware layout and configuration
Figure 2
Figure 3 helps you to locate
Audio DAC
QST connector
Extension connector
for GPIOs
RS-232
transceiver
RS-232
transceiver
IrDA
transceiver
SmartCard
interface
CAN
transceiver
3 BNC connectors
Potentiometer
USB type B
connector
USART 1
DB9 connector
USART 2
DB9 connector
USART 1
DB9 connector
SmartCard
connector
CAN
DB9 connector
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