Feature Summary; Tab. 3: Cpu, Memories, Busses - Dave Embedded Systems AXEL LITE Hardware Manual

AXEL LITE Hardware Manual
2.3

Feature Summary

Feature
CPU
Cache
RAM
Storage
Expansion bus
Feature
Graphics
Controller
2D/3D Engines
Video capture
Video
processing
Coprocessors
USB
UARTs
GPIO
Specifications
NXP i.MX6 S/D/Q ARM Cortex A9 MPCore @
1.2 GHz
L1: 32Kbyte instruction, 32Kbyte data
L2: Unified data/instruction, 1 MByte
Default: up to 2GB DDR3 (for 4GB support
please contact our sales department)
x64 data bus width @ 533 MHz
Bootable SPI NOR 16, 32, 64 MB
Flash NAND: all sizes, on request
One PCI Express 2.0 lane with integrated PHY
(5.0 GT/s Endpoint/Root Complex operations)

Tab. 3: CPU, Memories, Busses

Specifications
16-/24-bit HD Display Port
1x HDMI 1.4 channel + DDC
1x TFT/RGB output port
2x LVDS output ports
GPU2D cores for raster (R2D, Vivante GC320)
and vector (V2D, Vivante GC355) graphics
acceleration
GPU3D core (Vivante GC2000) for
OpenGL/OpenGL ES/OpenVG/OpenCL API
acceleration
1x RGB Parallel port 12 bit 1x MIPI CSI port
High performance, multi-standard VPU
Up to 1080p60 H264 decode
Up to 1080p30 H264 encode
Media Processing Engine with NEON™ &
VFPv3-D32 Floating-Point Unit
1x 2.0 OTG port (PHY on board)
1x 2.0 Host port (PHY on board)
5x UART ports (up to 1x full, up to 4x four-
wires)
Available lines, shared with other functions
October, 2016
v. 0.9.5
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