1Lvds0; 2Lvds1 - Dave Embedded Systems AXEL LITE Hardware Manual

AXEL LITE Hardware Manual
displays)
● Split channel output (one input source, split to 2 channels on output)
● Separate 2 channel output (2 input sources from IPU).
The output LVDS port complies to the EIA-644-A standard.
7.4.1.1 LVDS0
The following table describes the interface signals:
LVDS0_TX0_N
LVDS0_TX0_P
LVDS0_TX1_N
LVDS0_TX1_P
LVDS0_TX2_N
LVDS0_TX2_P
LVDS0_TX3_N
LVDS0_TX3_P
LVDS0_CLK_N
LVDS0_CLK_P
7.4.1.2 LVDS1
The following table describes the interface signals:
LVDS1_TX0_N
Pin name Conn.
Pin
J2.137
J2.139
J2.141
J2.143
J2.145
J2.147
J2.149
J2.151
J2.133
J2.135
Pin name Conn.
Pin
J2.159
Function
LVDS0 negative data 0
signal
LVDS0 positive data 0
signal
LVDS0 negative data 1
signal
LVDS0 positive data 1
signal
LVDS0 negative data 2
signal
LVDS0 positive data 2
signal
LVDS0 negative data 3
signal
LVDS0 positive data 3
signal
LVDS0 negative clock
signal
LVDS0 positive clock
signal
Function
LVDS1 negative data 0
October, 2016
v. 0.9.5
Notes
Notes
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