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AXEL LITE Hardware Manual
ECSPI1_SS2
ECSPI1_SS3
7.7.2
ECSPI2
The following table describes the interface signals:
ECSPI2_MISO
ECSPI2_MOSI
ECSPI2_SCLK
ECSPI2_SS0
ECSPI2_SS1
ECSPI2_SS2
ECSPI2_SS3
7.7.3
ECSPI3
The following table describes the interface signals:
ECSPI3_MISO
ECSPI3_MOSI
ECSPI3_RDY
ECSPI3_SCLK
ECSPI3_SS0
Pin name
Conn.
Pin
J2.168
J2.177
J2.99
J2.187
J2.101
J2.189
Pin name
Conn.
Pin
J2.78
J2.172
J2.76
J2.170
J2.74
J2.176
J2.80
J2.174
J2.168
J2.187
J2.189
Pin name
Conn.
Pin
J2.138
J2.136
J2.150
J2.134
J2.140
Function
Chip select 2 signal
Chip select 3 signal
Function
Master data in; slave
data out
Master data out; slave
data in
Clock signal
Chip select 0 signal
Chip select 1 signal
Chip select 2 signal
Chip select 3 signal
Function
Master data in; slave
data out
Master data out; slave
data in
Data ready signal
Clock signal
Chip select 0 signal
October, 2016
v. 0.9.5
Notes
Notes
Notes
49/63
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