System Boot; Boot Options; 1Spi Nor / Sd Option - Dave Embedded Systems AXEL LITE Hardware Manual

AXEL LITE Hardware Manual
condition.
Since SPI NOR flash can be used as boot device, CPU_PORn is
connected to this device too. This guarantees it is in a known state when
reset signal is released.
5.3

System boot

The boot process begins at Power On Reset (POR) where the hardware
reset logic forces the ARM core to begin execution starting from the on-
chip boot ROM. The boot ROM:
● determines whether the boot is secure or non-secure
● performs some initialization of the system and clean-ups
● reads the mode pins to determine the primary boot device
● once it is satisfied, it executes the boot code
5.3.1

Boot options

Two options are available related to system boot. They are identified by
the Boot field of the ordering code as follows:
● 0: SPI NOR / SD option (SOM code: DXLxxxx0xxR)
● 1: NAND / SD option (SOM code: DXLxxxx1xxR)
For both options, the selection of primary boot device is determined by
the BOOT_MODE_SEL signal as described in the following sections.
BOOT_MODE_SEL is latched when processor reset is released.
In any case, boot process is managed by on-chip boot ROM code that is
described in detail in processor's Reference Manual.
5.3.1.1 SPI NOR / SD option
Selection of primary boot device is determined by the
BOOT_MODE_SEL signal as described in the table below:
BOOT_MODE_SEL
Primary boot device
0
Primary boot device is SD1
(see section 5.5.3 for more
details)
October, 2016
v. 0.9.5
1 or floating
Primary boot device is
SPI NOR flash
connected to eCSPI1
(see section 3.3 for
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