Related Manuals for Dave Embedded Systems AXEL LITE
Summary of Contents for Dave Embedded Systems AXEL LITE
- Page 1 AXEL LITE Solo / Dual / Quad ARM Cortex-A9 MPCore CPU Module LITE LINE HARDWARE MANUAL www.dave.eu info@dave.eu DAVE Embedded Systems...
- Page 2 0.9.5 AXEL LITE Hardware Manual <Page intentionally left blank> October, 2016 2/63...
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Page 3: Table Of Contents
0.9.5 AXEL LITE Hardware Manual Table of Contents 1 Preface.............................6 1.1 About this manual......................6 1.2 Copyrights/Trademarks....................6 1.3 Standards..........................6 1.4 Disclaimers........................6 1.5 Warranty...........................6 1.6 Technical Support......................7 1.7 Related documents......................8 1.8 Conventions, Abbreviations, Acronyms................8 2 Introduction..........................10 2.1 Product Highlights......................12 2.2 Block Diagram........................13 2.3 Feature Summary......................14... - Page 4 0.9.5 AXEL LITE Hardware Manual 5.6 Multiplexing........................29 6 Pinout table..........................30 6.1 Carrier board mating connector J2.................31 7 Peripheral interfaces......................39 7.1 Notes on pin assignment....................39 7.2 Gigabit Ethernet......................39 7.3 USB..........................40 7.3.1 USB Host.........................40 7.3.2 USB OTG........................40 7.4 Video Output ports......................41 7.4.1 LVDS........................41...
- Page 5 Fig. 1: AXEL-LITE- Powered by I.MX6 processor..............10 Fig. 2: AXEL-LITE – Solo / Dual / Quad core ARM Cortex A9..........10 Fig. 3: AXEL LITE SOM (top view)....................12 Fig. 4: Board layout - Top view....................21 Fig. 5: Board layout - Bottom view....................22 Fig.
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Page 6: Preface
DAVE Embedded Systems does not assume any responsibility about availability, supplying and support regarding all the products mentioned in this manual that are not strictly part of the AXEL LITE CPU module. AXEL LITE CPU Modules are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. -
Page 7: Technical Support
DAVE Embedded Systems will not be responsible for any defects or damages to other products not supplied by DAVE Embedded Systems that are caused by a faulty AXEL LITE module. -
Page 8: Related Documents
0.9.5 AXEL LITE Hardware Manual Related documents Document Location http://wiki.dave.eu/index.php/Main_ DAVE Embedded Systems Developers Wiki Page NXP i.MX 6Dual/6Quad http://cache.freescale.com/files/32 Applications bit/doc/ref_manual/IMX6DQRM.pdf Processor Reference Manual ?fpsp=1&WT_TYPE=Reference %20Manuals&WT_VENDOR=FRE ESCALE&WT_FILE_FORMAT=pdf &WT_ASSET=Documentation Tab. 1: Related documents Conventions, Abbreviations, Acronyms Abbreviation Definition i.MX 6 APRM i.MX 6 Application Processor Reference... -
Page 9: Revision History
0.9.5 AXEL LITE Hardware Manual Revision History Version Date Notes 0.8.0 February 2014 First Draft 0.8.5 February 2014 First Revision 0.9.0 February 2014 First Release 0.9.1 May 2014 Minor fixes Added J7 pinout Completed Section 5 Added UART4 interface 0.9.2... -
Page 10: Introduction
0.9.5 AXEL LITE Hardware Manual Introduction AXEL LITE is the new top-class Single - Dual - Quad Core ARM Cortex- A9 CPU module by DAVE Embedded Systems, based on the recent NXP i.MX6 application processor. Thanks to AXEL LITE, customers have the chance to save... - Page 11 0.9.5 AXEL LITE Hardware Manual with the LITE Line CPU modules where quality and reliability are important factors. October, 2016 11/63...
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Page 12: Product Highlights
● Reduced carrier complexity: SDIO, dual CAN, USB, Ethernet with on- board PHY, GPIOs ● Multiple video outputs available ● H264 Video encoding and decoding ● Multiple video inputs available Fig. 3: AXEL LITE SOM (top view) October, 2016 12/63... -
Page 13: Block Diagram
0.9.5 AXEL LITE Hardware Manual Block Diagram October, 2016 13/63... -
Page 14: Feature Summary
0.9.5 AXEL LITE Hardware Manual Feature Summary Feature Specifications Options NXP i.MX6 S/D/Q ARM Cortex A9 MPCore @ 1.2 GHz Cache L1: 32Kbyte instruction, 32Kbyte data L2: Unified data/instruction, 1 MByte Default: up to 2GB DDR3 (for 4GB support... -
Page 15: Tab. 4: Peripherals
0.9.5 AXEL LITE Hardware Manual Feature Specifications Options (interrupts available) Networks Default: Fast Ethernet 10/100 Mbps with integrated PHY (for Gigabit support please contact our sales department) 2x CAN 2.0B ports (1x with integrated PHY) SD/MMC up to 3x SD 3.0 /SDIO 3.0/MMC 4.x compliant... -
Page 16: Design Overview
0.9.5 AXEL LITE Hardware Manual Design overview The heart of AXEL LITE module is composed by the following components: ● NXP i.MX6 Solo / Dual / Quad core SoC application processor ● Power supply unit ● DDR memory banks ●... - Page 17 0.9.5 AXEL LITE Hardware Manual ● Video and night vision equipment ● Multimedia-focused products ● Entertainment and gaming appliances The i.MX6 application processor is composed of the following major functional blocks: ● ARM Cortex-A9 MPCore 2x/4x CPU Processor, featuring: ...
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Page 18: Ddr3 Memory Bank
NOR flash bank NOR flash is a Serial Peripheral Interface (SPI) device. This device is connected to the eCSPI channel 1. Specific models of the AXEL LITE SOM provide the SPI NOR as boot memory. The following table reports the NOR flash specifications:... -
Page 19: Nand Flash Bank
Size max Chip select ECSPI1_SS0 Bootable Tab. 8: NOR flash specifications For AXEL LITE models that have the NOR flash bank populated, the eCSPI channel 1 is mapped by design on the following multiplexed pins: NOR signal Function I.MX6 signal I.MX6 ball #... -
Page 20: Power Supply Unit
0.9.5 AXEL LITE Hardware Manual Power supply unit AXEL LITE, as the other LITE Line CPU modules, embeds all the elements required for powering the unit, therefore power sequencing is self-contained and simplified. Nevertheless, power must be provided from carrier board, and therefore users should be aware of the ranges power supply can assume as well as all other parameters. -
Page 21: Mechanical Specifications
Mechanical drawings are available in DXF format from the Axel page on DAVE Embedded Systems website (http://www.dave.eu/products/axel-lite) Board Layout The following figure shows the physical dimensions of the AXEL LITE module: Fig. 4: Board layout - Top view ● Board width: 43.18 mm... -
Page 22: Connectors
● Maximum components height is 3.4 mm ● PCB thickness is 1.0 mm Connectors The following figure shows the AXEL LITE connectors layout: Fig. 5: Board layout - Bottom view The following table reports connectors specifications: Standard SO-DIMM 204-pin (DDR3) -
Page 23: Power, Reset And Control
Implementing correct power-up sequence for i.MX6 processors is not a trivial task because several power rails are involved. AXEL LITE SOM simplifies this task by embedding all the required circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring... -
Page 24: Power-Up Sequence
0.9.5 AXEL LITE Hardware Manual The PSU is composed of two main blocks: ● power management integrated circuit (PMIC, NXP PF0100E0 - on request this part is available in automotive grade) ● additional generic power management circuitry that completes PMIC functionalities. -
Page 25: Power Rails And Related Signals
● 3.3VIN: this is external main power rail. Voltage range is 3.3V ±5% ● PMIC_CELL: PMIC's coin cell supply input/output ● BOARD_PGOOD: this output signal is used to indicate when carrier board's circuitry interfacing AXEL LITE's I/Os has to be powered up For further details, please refer to the PMIC documentation: http://www.freescale.com/webapp/sps/site/prod_summary.jsp? -
Page 26: Reset Scheme And Control Signals
0.9.5 AXEL LITE Hardware Manual Reset scheme and control signals The following picture shows the simplified block diagram of reset scheme and voltage monitoring. PMIC_VSNVS PMIC_VSNVS RESETBMCU BOOT_MODE1 BOOT_MODE1 BOOT_MODE0 BOOT_MODE0 PMIC PF0100 E0 i.MX6 PMIC_VSNVS Module Connectors PWRO... -
Page 27: System Boot
0.9.5 AXEL LITE Hardware Manual condition. Since SPI NOR flash can be used as boot device, CPU_PORn is connected to this device too. This guarantees it is in a known state when reset signal is released. System boot The boot process begins at Power On Reset (POR) where the hardware reset logic forces the ARM core to begin execution starting from the on- chip boot ROM. -
Page 28: 2Nand / Sd Option
U-Boot feature, the user will need, sooner or later, to recover (bare-metal restore) the AXEL LITE SOM without using the bootloader itself. The following paragraphs introduce the available options. For further information, please refer to DAVE Embedded Systems Developers Wiki or contact the Technical Support Team. -
Page 29: Usb Recovery
0.9.5 AXEL LITE Hardware Manual recovery operations. For further information on how to use the JTAG interface, please contact the Technical Support Team. 5.5.2 USB Recovery The USB Serial Downloader provides a means to download the bootloader image to the chip over USB serial connection. Please refer to the XELK Quick Start Guide for further details. -
Page 30: Pinout Table
0.9.5 AXEL LITE Hardware Manual Pinout table This chapter contains the pinout description of the AXEL LITE module, grouped in two tables (odd and even pins) that report the pin mapping of the 204-pin SO-DIMM AXEL LITE connector. Each row in the pinout tables contains the following information:... -
Page 31: Carrier Board Mating Connector J2
0.9.5 AXEL LITE Hardware Manual Carrier board mating connector J2 J2 – ODD [1-203] Pin Name Internal Connections Ball/ Supply Type Voltage Note pin # Group J2.1 DGND DGND J2.3 3.3VIN INPUT VOLTAGE J2.5 3.3VIN INPUT VOLTAGE J2.7 3.3VIN INPUT VOLTAGE J2.9... - Page 32 0.9.5 AXEL LITE Hardware Manual J2 – ODD [1-203] Pin Name Internal Connections Ball/ Supply Type Voltage Note pin # Group J2.53 SD3_DATA7 CPU.SD3_DATA7 J2.55 SD3_CMD CPU.SD3_CMD J2.57 DGND DGND J2.59 SD3_CLK CPU.SD3_CLK J2.61 SD2_DATA0 CPU.SD2_DATA0 J2.63 SD2_DATA1 CPU.SD2_DATA1 J2.65...
- Page 33 0.9.5 AXEL LITE Hardware Manual J2 – ODD [1-203] Pin Name Internal Connections Ball/ Supply Type Voltage Note pin # Group J2.117 HDMI_D0P CPU.HDMI_D0P J2.119 HDMI_D1N CPU.HDMI_D1N J2.121 HDMI_D1P CPU.HDMI_D1P J2.123 HDMI_D2N CPU.HDMI_D2N J2.125 HDMI_D2P CPU.HDMI_D2P J2.127 HDMI_CEC_IN CPU.HDMI_DDCCEC J2.129...
- Page 34 0.9.5 AXEL LITE Hardware Manual J2 – ODD [1-203] Pin Name Internal Connections Ball/ Supply Type Voltage Note pin # Group J2.173 LVDS1_TX3_P CPU.LVDS1_TX3_P J2.175 DGND DGND J2.177 EIM_D19 CPU.EIM_D19 J2.179 EIM_D20 CPU.EIM_D20 J2.181 EIM_D21 CPU.EIM_D21 J2.183 EIM_D22 CPU.EIM_D22 J2.185...
- Page 35 0.9.5 AXEL LITE Hardware Manual J2 – EVEN [2-204] Pin Name Internal Connections Ball/ Supply Type Voltage Note pin # Group J2.12 DGND DGND J2.14 PMIC_LICELL PMIC.LICELL J2.16 CPU_ONOFF CPU.CPU_ONOFF J2.18 BOARD_PGOOD J2.20 BOOT_MODE_SEL BOOT MODE SELECTION J2.22 CPU_PORN CPU.CPU_PORN...
- Page 36 0.9.5 AXEL LITE Hardware Manual J2 – EVEN [2-204] Pin Name Internal Connections Ball/ Supply Type Voltage Note pin # Group J2.76 CSI0_DAT9 CPU.CSI0_DAT9 J2.78 CSI0_DAT10 CPU.CSI0_DAT10 J2.80 CSI0_DAT11 CPU.CSI0_DAT11 J2.82 DGND DGND J2.84 CLK1_N CPU.CLK1_N J2.86 CLK1_P CPU.CLK1_P J2.88...
- Page 37 0.9.5 AXEL LITE Hardware Manual J2 – EVEN [2-204] Pin Name Internal Connections Ball/ Supply Type Voltage Note pin # Group J2.140 DISP0_DAT3 CPU.DISP0_DAT3 NVCC_ J2.142 DISP0_DAT4 CPU.DISP0_DAT4 NVCC_ J2.144 DISP0_DAT5 CPU.DISP0_DAT5 NVCC_ J2.146 DGND DGND NVCC_ J2.148 DISP0_DAT6 CPU.DISP0_DAT6...
- Page 38 0.9.5 AXEL LITE Hardware Manual J2 – EVEN [2-204] Pin Name Internal Connections Ball/ Supply Type Voltage Note pin # Group J2.204 DGND DGND October, 2016 38/63...
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Page 39: Peripheral Interfaces
“Notes” column on the table of each interface. ● The peripherals described in the following sections represent the default configuration for the AXEL LITE SOM, which match with the features provided by the electronics implemented on the module. -
Page 40: Usb
ETH0_LED1 J2.13 Activity LED ETH0_LED2 J2.15 Link LED AXEL LITE provides two USB ports with integrated PHY, one USB Host 2.0 (High Speed, up to 480 Mbps) and one USB 2.0 On-The-Go (OTG). 7.3.1 USB Host Pin name Conn. Function... -
Page 41: Video Output Ports
0.9.5 AXEL LITE Hardware Manual Pin name Conn. Function Notes USB_OTG_DN J2.196 D- pin of the USB cable USB_OTG_DP J2.198 D+ pin of the USB cable USB_OTG_VBUS J2.186 VBUS pin of the USB cable USB_OTG_ID J2.28 USB OTG ID Video Output ports i.MX6 implements two (identical) Image Processing Units (IPUs), which... -
Page 42: 1Lvds0
0.9.5 AXEL LITE Hardware Manual displays) ● Split channel output (one input source, split to 2 channels on output) ● Separate 2 channel output (2 input sources from IPU). The output LVDS port complies to the EIA-644-A standard. 7.4.1.1... -
Page 43: Hdmi
7.4.2 HDMI The HDMI interface available on AXEL LITE is based on the HDMI transmitter and the HDMI 3D Tx PHY integrated into the i.MX6 SoC. The HDMI port supports the following standards and features: ● High-Definition Multimedia Interface Specification, Version 1.4a ●... -
Page 44: Parallel Rgb
J2.129 HDMI HPD signal 7.4.3 Parallel RGB The Parallel Display interface provided by AXEL LITE is derived directly from the DI0 port of the IPU, bypassing all the i.MX6 integrated display bridges. The following table describes the interface signals: Pin name Conn. -
Page 45: Video Input Ports
This section will be completed in a future version of this manual. 7.5.2 MIPI CSI This section will be completed in a future version of this manual. UARTs Five UART ports are routed to AXEL LITE connectors. UART1 provides October, 2016 45/63... -
Page 46: Uart1
0.9.5 AXEL LITE Hardware Manual full Modem Control Signals, while UART2, UART3, and UART5 are 4- wire interfaces. UART4 is a 2-wire interface. Each port can be programmed separately (also in IrDA mode). 7.6.1 UART1 The following table describes the interface signals: Pin name Conn. -
Page 47: Uart3
0.9.5 AXEL LITE Hardware Manual 7.6.3 UART3 The following table describes the interface signals: Pin name Conn. Function Notes UART3_CTS J2.185 Clear to send J2.199 J2.45 UART3_RTS J2.201 Request to send J2.37 UART3_RX_DATA J2.189 Serial/infrared data receive UART3_TX_DATA J2.187... -
Page 48: Spi
0.9.5 AXEL LITE Hardware Manual AXEL LITE provides up to five SPI ports connected to the I.MX6 integrated Enhanced Configurable SPI (ECSPI) controller, featuring: ● Full-duplex synchronous serial interface ● Master/Slave configurable ● Up to four Chip Select (SS) signals to support multiple peripherals ●... -
Page 49: Ecspi2
0.9.5 AXEL LITE Hardware Manual Pin name Conn. Function Notes J2.168 J2.177 ECSPI1_SS2 J2.99 Chip select 2 signal J2.187 ECSPI1_SS3 J2.101 Chip select 3 signal J2.189 7.7.2 ECSPI2 The following table describes the interface signals: Pin name Conn. Function... -
Page 50: Ecspi4
J2.187 Chip select 2 signal ECSPI4_SS3 J2.189 Chip select 3 signal 7.7.5 ECSPI5 ECSPI5 is not available on the AXEL LITE models that mount the i.MX6 Solo SOC. The following table describes the interface signals: Pin name Conn. Function Notes ECSPI5_MISO J2.75... -
Page 51: I²C
J2.67 Chip select 3 signal I²C Three I²C channels are available on AXEL LITE to provide an interface to other devices compliant with Philips Semiconductors Inter-IC bus (I2C- bus™) specification version 2.1. The I²C ports support standard mode (up to 100K bits/s) and fast mode (up to 400K bits/s). -
Page 52: Can
J2.40 I2C data J2.48 AXEL LITE provides two CAN interfaces (FLEXCAN1 and FLEXCAN2) for supporting distributed realtime control with a high level of reliability. The FLEXCAN module implements the CAN protocol version 2.0 part B and supports bit rates up to 1 Mbit/s. -
Page 53: Flexcan2
0.9.5 AXEL LITE Hardware Manual 7.9.2 FLEXCAN2 When required, FLEXCAN2 must be connected to an external PHY on the carrier board. The following table describes the interface signals: Pin name Conn. Function Notes FLEXCAN2_RX J2.107 Receive data pin J2.41 FLEXCAN2_TX J2.105... -
Page 54: Sd/Sdio/Mmc
Output (SDIO) V3.00 specifications. The controller supports 1-bit / 4-bit SD and SDIO modes, 1-bit / 4-bit / 8-bit MMC modes. High capacity SD cards (SDHC) are supported. Three MMC/SD/SDIO interfaces are available on AXEL LITE SOM. 7.11.1 MMC/SD/SDIO1 The following table describes the interface signals: Pin name Conn. -
Page 55: Mmc/Sd/Sdio2
0.9.5 AXEL LITE Hardware Manual Pin name Conn. Function Notes SD1_DATA2 J2.79 DATA2 line or Read Read Wait in 1-bit mode Wait in 4-bit mode SD1_DATA3 J2.81 DATA3 line in 4/8-bit May be configured as mode or card detection... -
Page 56: Mmc/Sd/Sdio3
0.9.5 AXEL LITE Hardware Manual Pin name Conn. Function Notes SD2_DATA3 J2.67 DATA3 line in 4/8-bit May be configured as mode or card detection configured as card pin in 1-bit mode detection pin SD2_LCTL J2.40 LED control used to... -
Page 57: Pci Express
0.9.5 AXEL LITE Hardware Manual Pin name Conn. Function Notes SD3_DATA5 J2.49 DATA5 line in 8-bit mode, not used in other modes SD3_DATA6 J2.51 DATA6 line in 8-bit mode, not used in other modes SD3_DATA7 J2.53 DATA7 line in 8-bit... -
Page 58: Gpio
0.9.5 AXEL LITE Hardware Manual 7.15 GPIO The i.MX6 GPIO module provides general-purpose pins that can be configured as either inputs or outputs, for connections to external devices. In addition, the GPIO peripheral can produce CORE interrupts. The device contains eight GPIO blocks and each GPIO block is made up of 32 identical channels. -
Page 59: Operational Characteristics
Providing theoretical maximum power consumption value would be useless for the majority of system designers building their application upon AXEL LITE module because, in most cases, this would lead to an over-sized power supply unit. Several configurations have been tested in order to provide figures that are measured on real-world use cases instead. -
Page 60: Set 2
That are implemented in software on an hardware properly set. DAVE Embedded Systems has implemented in the Linux BSP, and maintained in the time, many of the Software Thermal Management Techniques listed in the Application Notes. Check with your DAVE Embedded Systems' Technical Support which are currently maintained and which are the default settings. -
Page 61: Tab. 11: Power Dissipation Vs.thermal Resistance
0.9.5 AXEL LITE Hardware Manual fundamental formula. and knowing that R =22 °C/W for no-lid i.MX6 case, you can verify that natural convection with no heat sink make CPU working only around 20- 25°C (see table 11) To lower R - the only available parameter –... - Page 62 0.9.5 AXEL LITE Hardware Manual It is mandatory to understand that Thermal Management Techniques are under the responsability of the system integrator. Even if these notes try to help also with some quantitative suggestion, every solution must be validated by the System Integrator itself at the end of the integration process.
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Page 63: Application Notes
0.9.5 AXEL LITE Hardware Manual Application notes Please refer to the following documents available on DAVE Embedded Systems Developers Wiki: Document Location Integration Guide http://wiki.dave.eu/index.php/Integration_guide _%28Axel%29 Carrier board design guidelines http://wiki.dave.eu/index.php/Carrier_board_d esign_guidelines_%28SOM%29 October, 2016 63/63... - Page 64 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: DAVE Embedded Systems DXLH5290I...
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