Peripheral Interfaces; Notes On Pin Assignment; Gigabit Ethernet - Dave Embedded Systems AXEL LITE Hardware Manual

Solo / dual / quad arm cortex-a9 mpcore cpu module
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AXEL LITE Hardware Manual
7

Peripheral interfaces

AXEL LITE modules implement a number of peripheral interfaces
through the SO-DIMM connector. The following notes apply to those
interfaces:
● Some interfaces/signals are available only with/without certain
configuration options of the AXEL LITE module. Each signal's availability is noted
in the "Notes" column on the table of each interface.
● The peripherals described in the following sections represent the default
configuration for the AXEL LITE SOM, which match with the features provided by
the electronics implemented on the module.
The signals for each interface are described in the related tables. The
following notes summarize the column headers for these tables:
● "Pin name" – The symbolic name of each signal
● "Conn. Pin" – The pin number on the module connectors
● "Function" – Signal description
● "Notes" – This column summarizes configuration requirements and
recommendations for each signal.
7.1

Notes on pin assignment

For further information, please refer to section 5.6 "Multiplexing".
7.2

Gigabit Ethernet

On-board Ethernet PHY (Micrel KSZ9031RNX) provides interface signals
required to implement the 10/100/1000 Mbps Ethernet port. The
transceiver is connected to the triple speed Ethernet MAC (ENET
module) through RGMII interface.
The following table describes the interface signals:
ETH0_TXRX0_P
Pin name
Conn.
Pin
J2.19
Function
Media Dependent
Interface[0], positive pin
October, 2016
v. 0.9.5
Notes
39/63

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