Solid State Logic Matrix Owner's Manual page 108

Appendix B - Technical Specifications
M M a a t t r r i i x x D D i i g g i i t t a a l l I I O O S S p p e e c c i i f f i i c c a a t t i i o o n n s s
Test conditions (unless otherwise specified): Input test signal is a 1 kHz sine wave; measurement bandwidth is 22Hz to 22kHz,
signal level is –1dBFs.
Stereo ADC
Source selectable between Mix bus, Record bus and Monitor (pre level control) signals.
Connections: S/PDIF (TosLink optical) and AES-3 (male XLR). Signal available on both connectors at all times.
Sample rate – locks to selected digital input up to a maximum sample rate of 176.4kHz. In the absence of a valid digital input
defaults to 44.1kHz.
Dynamic range typically 113dB A-weighted, 111dB unweighted. Worst case 108dB unweighted
THD < 0.0015%
0dBFs switchable between +18dBu and +24dBu
DAC
Connections: source selectable from Matrix front panel between S/PDIF (TosLink optical) and AES-3 (female XLR) inputs.
Sample rate 32kHz to 176.4kHz
Dynamic range typically 116dB A-weighted, 111dB unweighted. Worst case 109dB unweighted
THD < 0.001%
0dBFs switchable between +18dBu and +24dBu
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