Tandy 2000 Service Manual page 70

Tandy@
Model
2000
Service
Manual
clocked
into the flip flop, forcing
VIDLDSH
low.
Qc
rising
edge (one state after
VIDLDSH
goes
low) presets the
74574,
foicing
IIDLDSH
high.
When
a
count
of
OFH
is
reached, the
RC*
(Ripple Clock) output of the
74L5669
counter
goes Iow,
and
forces the
counter
to reload the initial count value
on
the next clock.
The
8 dot-per-character
mode
is identical
except
that the counter is
loaded
with
08H
(VIDCCLK*
period
becomes
two
states shorter).
Delay
logic (in the
form
of a 6-shift register)
delays
two
of the attribute signals
(BLC
and
BKC)
as
well as
the
composite
sync
signal.
The
attribute signals
need
two
CCLK
delays
because
the
902L adds
these delays
to aII attribute
inputs
except
BLC
and
BKC.
The
delay of the
composite
sync
signal
was
required
because
the
9007
offsets the "real"
sync
signals (vertical
and
horizontal sync) from
the
composite
sync
signal by two character
times.
Both
the
monochrome
graphici
adapler and
the color video
adapter
require all
timing to line
up.
During
a video
DII{A
cycle,
BUSAI5
thru
BUSA19' BUSMCS0*' and
BUSMCSI*
are driven to states defined by the
address
control
register
(see below) through
a
74L5244
driver.
BUSAOO
and
BUSBHE*
are driven low through
bidirectional drivers in
an
82S153
integrated field logic
device
to
enable
16-bit
data
transfers to the
CRT9007
and
the
CRT9212s.
BUSMR*
is
also
driven through
a bidirectional driver in the 82S153. Its
timing is derived
from
VIDCCLK*
and DLYCCLK* (VIDCCLK*
delayed
by about 100 nsec)
so that
CPUI,IR*
goes
active
low
115 nsec
lfter
VIDCCLK*
rising
edge and
stays low until
the
next
VIDCCLK*
rising
edge.
Scan
line data is output by the
CRT9007
in a serial
fashion
with the
LSB
output fj.rst. A
74L5378
is
used
to convert
the
data from serial to parallel for
use
by the
character
generator.
Each
bit is output
on
CCLK*
rising
edge
on
SLD
lS.an Line Data) as
framed
by
SLG* (Scan
Line Gate, active
low).
The
CRT9021
has an
on-chip shift register to
perform
the
same
function.
A
flexible
means
for transporting video signals
from the
monochrome
system
to the color monitor
and
from
the
high
resolution giaphics option
board
to the
monochrome
monitor
is provided.
Two
single-bit data buses'
AGVID
(al-phanumerics/Graphi-s
vlDeo)
and ArNT (Alphanumerics
INTensity) form the bidirectional data path.
VIDOUTSEL
(VIDeo
O0f
Snlect) controls the
monochrome
monitor
which
wiIl display character video or high resolution
graphics
video
(see Address
Control Register, below).
Both
types of
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