Tandy 2000 Service Manual page 569

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82
5
gA/9259
A-21
g2
5
gA-g
FULLY
NESTED MODE
This
mode
is
entered
after initialization unless
another
mode
is
programmed.
The interrupt requests
are
ordered in
priority
form
0
through
7 (0
highest). When
an
interrupt
is acknowledged the highest
priority
request
is
determined and
its
vector placed
on the bus. Additional-
ly, a
bit of the
Interrupt
Service
register
(lSO-7)
is
set.
This bit
remains set until the microprocessor issues
an
End
of
Interrupt (EOl) command immediately
before
returning from the service routine, or if
AEOI
(Automatic
End
of
Interrupt)
bit is
set,,
until the trailing edge of
the
last
INTA. While
the lS bit
is set, all
further interrupts
of
the
same
or
lower
priority are
inhibited, while
higher
levels
will
generate
an
interrupt (which
will
be
acknowledged
only
if
the
microprocessor
internal
Inter-
rupt enable flip-flop has
been re-enabled through
soft-
ware).
After
the
lnitiaf
ization
sequence,
f
R0 has
the
highesr
priority
and
lR7
the lowest" Priorities
can be changed, as
will
be
expf
ained, in
the rotating priority
mode.
END
OF
TNTERRUPT (EOt)
The
f
n Service (lS)
bit
can be reset either
automaticaf
ly
following
the
trailing
edge
of the last in sequence
INTA
pulse
(when
AEOI
bit in lCWl is
set) or by a command
word that must be issued to
the 8259A before returning
f
rom
a
service routine (EOl command).
An
EOf command
must be issued twice if
in the Cascade mode, cnce for
the
master and once
f
or the
corresponding
slave.
There are two forms of
EOI
command:
Specif ic and Non,
Specif
ic.
When the
8259A
is
operated
in
modes which
preserve
the fully
nested structure,
it
can
determine
which lS bit to
reset
on
EOI
When
a
Non.Specif
ic
EOI
command
is
issued the
8259A
will
automatically
reset
the highest lS bit of
those that
are
set, since
in
the
f
ully nested mode the highest
lS level was necessarily the
last
level acknowledged and serviced. A non-specific
EOI
can be issued with
OCW2
(EOl
:
1, SL
-
0, R
:0)"
when
a mode is
used
which
may disturb the fully
nested
structure, the
8259A may no longer
be
able
to
determine
the last level acknowledged*
In
this
case
a
Specific
End of
Interrupt must
be issued
which
includes
as
part of
the
command the lS level to
be reset.
A
specific
EOI can be
is-
sued with
OCW2 (EOl
:
1,
SL
:
1, R - 0,
and LO-L?is
the
binary level of the lS bit to
be
reset).
It
should be noted that an lS bit that is
masked by
an
IMR
bit will
not
be cleared by a non-specific Eot if
the
8259A
is in
the Special Mask
Mode.
AUTOMATTC END
OF
f
NTERRUPT (AEOf)
MOoE
lf
AEOf
=
1
in
fCW4,
then
the 8259A
will
operate in AEol
mode
continuously until
reprogrammed
by
lCw4.
In
this
mode
the
82594
will
automatically perform
a
non-
specific
EOI operation
at the
traifing
edge
of
the
last
interrupt
acknowledge pulse
(third pulse
in
MCS-80/85,
second
in
iAPX
86)
Note that from
a system standpoint,
this
mode should
be used only when a nested multilevel
interrupt structure
is not required within
a
single
8259A.
The
AEol
mode can only
be used in a master 82594
and
not
a
slave.
AUTOMATIC
ROTATION
(Equal Priority Devices)
f
n some
applications there
are
a number
of
interrupting
devices
of
equal
priority. In
this
mode a device,
after
being serviced, receives
the low€st
priority,
so a device
requesting an interrupt
will
have
to wait, in the
worst
case
until
each
of
7 other devices are serviced at
rnost
once. For example, if
the priority
and
"in
service" status
is.
Bcloru
Rotrtr (lR4
the highest
priority
requiring
service)
rs7
rst
tss rs4
f
s3
f
s2
f
sr
f
so
m
Hlghrrt
Prtorlty
After
Rotrtc
(lR4
was serviced,
af
l other priorities
rotated
correspond
ing ly)
rs7 rsc rss
f
s4 ts3 tsz
tsl
tso
"lS"
Slatus
Prrorrty Status
0t0t0
Hlghtrt
Prlorlty Loworl
Prlodty
There are two ways
to
accomplish Automatic
Rotation
using
OCW2, the
Rotation
on Non-Specif ic
EOI
Command
(R:
1,
SL
-
0, EOI
.:
1)and
the Rotate in Automatic
EOI
Mode which
is
set by (R
-
1,
SL
-- 0, EOI
:
0)
and cleared
by (R
-
0,
SL
-
0, EOI
r-
0).
SPECIFIC ROTATION
(Specific Priority)
The programmer can change
priorities
by programming
the bottom priority and
thus fixing
afl other priorities;
i.e.,
if
lR5
is programmed as the
bottom priority
device,
then
lR6
will
have
the highest
one.
The
set Priority
command is issued in oCwz
where:
R -
'l
,
sL:
1;Lo-Lz
isthe binarypriority
level codeof
the
bottom priority
device.
observe that
in
this
mode internal status is
updated
by
software controlduring
OCW2.
However,
it is
independent
of the End
of
Interrupt
(Eol)
command
(also executed
by
oCW2). Priority changes can
be executed
during
an Eol
command
by using
the
Rotate on
Specif
ic
EOI
command
in
OCW2
(R
-
1,
SL:
1, EOI
-:1
and
LO-LZ:
lR level to
receive bottom priority).
INTERRUPT MASKS
Each
Interrupt
Request
input
can be
masked individu-
af
ly
by
the Interrupt Mask
Register (lMR) programmed
through
ocw1.
Each
bit
in the
IMR
masks one interrupt
channel
if it
is
set (1).
Bat
0 masks lR0,
Bit
1 masks
lR1
and so
forth.
Masking an
fR
channef does not affect
the
other channels operation.
"lS"
Slatus
Prrorrty Status
Lowml
Prlorlry
U
1
I
0 0 0 0 0 0
2-130
AFN.OO221
E