Tandy 2000 Service Manual page 504

iru'
Integrated Feature
Set
-fphanced
8086-2
CPU
-Clock
Generator
-2
Independent, High-Speed DMA
Channels
-Programmable
Interrupt Controller
-3
Programmable 16-bit Timers
-Pvegrammable
Memory and
Peripheral Chip-Select Logic
-pTsgrammable
Wait State Generator
-Local
Bus Controlfer
Available in 8 MHz (80186) and cost
effective 6
M
Hz (80186-6) versions.
H
igh-Performance Processor
-2
Times
the
Performance
of
the
Standard IAPX
86
-4
MBytelSec Bus Bandwidth
Interf ace
IAPX
186
HIGH INTEGRATION
1
6-8IT
MICROPROCESSOR
Direct Addressing Capability to
1 MByte
of Memory
Completely Object Code Compatible
with Alf Existing
|APX
86,88 Software
-10
New Instruction Types
Complete System Development
Support
-Pgvelopment
Software
:
Assembler,
PL/M, Pascaf, Fortran, and System
Utilities
-
|
n
- Ci
rcuit-
Ernulator
(lel CE'u-1 86)
-|RMX'"
86, 88
Compatible
(801
30
OSR
Optional Numeric Processor Extension
-IAPX
1
86/20
High-Performance 80-bit
Numeric Data Processor
INTSIINTAT
PROGRAMMABLE
INTERRUPT
CONTROLLER
MAX COUNT
REGISTER B
MAX COUNT
REGISTER A
16-8lT
GENERAL
PURPOSE
REGISTERS
CONTROL REGISTERS
INTERNAL
BUS
PROGRAMMABLE
DMA UNIT
CHIP.SELECT
UNIT
20-BlT
SOURCE POINTERS
20-BtT
DESTINATION
POINTERS
1EBff
SEGMENT
REGISTERS
PROGRAMMABLE
CONTROL
REGISTERS
16-BtT
TRANSFER COUNT
CONTROL
REGISTERS
"T"
t
TMR OUT
1
TMR OUT
O
TMR
IN I
TMR IN
so-sT
SRDY
ARDY
TEST
HOLD
HLOA
FES
RESET
LOCK
t
wFALE
V
V
RD
AD0-
A16/S3-
DT,'F
B-H=.E/S7 AD15
A19/56
l,tCSO-g
PCSO-I
Figure
f
.
IAPX
186 Block Diagram
Iniel
Co(poration Assumes No Responsibility lor the
Use
ol
Any
Circuitry
Other Than
Clrcuitry
Embodied in an
Intel
Product. No Other
Circuit
Patent Licenses a.e lmplied.
Information Contained
Herein Supercedes Previously Published
Specifications On These Devices
From
lntel.
e-
INTEL CORPORATION,
1983
JULY 1983
ORDER
NUilBER:
210'151-ffi3