OLIMEX© 2012
STM32-P207 user's manual
CHAPTER 4 THE STM32F207ZET6 MICROCONTROLLER
4. Introduction to the chapter
In this chapter is located the information about the heart of STM32-P207 – its microcontroller. The
information is a modified version of the datasheet provided by its manufacturers.
4.1 The microcontroller
■ Core: ARM 32-bit Cortex™-M3 CPU with Adaptive real-time accelerator (ART Accelerator™)
allowing 0-wait state execution performance from Flash memory, frequency up to 120 MHz,
memory protection unit, 150 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1)
■ Memories
– 512 Kbyte of Flash memory
– 512 bytes of OTP memory
– 128 (112+16) + 4 Kbytes of SRAM
– Flexible static memory controller that supports Compact Flash, SRAM, PSRAM, NOR and
NAND memories
– LCD parallel interface, 8080/6800 modes
■ Clock, reset and supply management
– From 1.65 to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– 4 to 26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC (1% accuracy at 25 °C)
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
■ Low power
– Sleep, Stop and Standby modes
– VBAT supply for RTC, 20 × 32 bit backup registers, and optional 4 KB backup SRAM
■ 3 × 12-bit, 0.5 µs A/D converters
– 24 channels
– 6 MSPS in triple interleaved mode
■ 2 × 12-bit D/A converters
■ General-purpose DMA
– 16-stream DMA controller with centralized FIFOs and burst support
■ 14 timers
■ Debug mode
– Serial wire debug (SWD) & JTAG interfaces
– Cortex-M3 Embedded Trace Macrocell™
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