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efesotomasyon.com - Allen Bradley,Rockwell,plc,servo,drive
98
Using the High-Speed Counter and Programmable Limit Switch
Publication 1763-RM001C-EN-P - October 2009
The HSC UIX bit can be used in the control program as conditional logic
to detect if an HSC interrupt is executing.
The HSC sub-system will clear (0) the UIX bit when the controller
completes its processing of the HSC subroutine.
User Interrupt Pending (UIP)
Description Address
Data Format
UIP - User
HSC:0/UIP bit
Interrupt
Pending
(1) For Mode descriptions, see HSC Mode (MOD) on page 107.
The UIP (User Interrupt Pending) is a status flag that represents an
interrupt is pending. This status bit can be monitored or used for logic
purposes in the control program if you need to determine when a
subroutine cannot be executed immediately.
This bit is maintained by the controller and is set and cleared
automatically.
User Interrupt Lost (UIL)
Description Address
Data Format HSC Modes
UIL - User
HSC:0/UIL bit
Interrupt Lost
(1) For Mode descriptions, see HSC Mode (MOD) on page 107.
The UIL (User Interrupt Lost) is a status flag that represents an interrupt
has been lost. The controller can process 1 active and maintain up to 2
pending user interrupt conditions.
This bit is set by the controller. It is up to the control program to utilize,
track if necessary, and clear the lost condition.
(1)
Type
User Program Access
HSC Modes
0 to 7
status read only
(1)
Type
User Program Access
0 to 7
status read/write
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