Group 36: 12-Pulse Operating - ABB DCS 500B Description

Group 36: 12-PULSE OPERATING

REV_DELAY
Parameter of 12-PULSE LOGIC-function block
A bridge reversal takes place in several steps. When the current has reached very low
values this delay time is started to make sure, the current will become zero and then the
bridges will be swapped and the current controller will be released. The delay time is
defined in multiples of cycles (cycle = 3.3 ms at 50 Hz / 2.78ms at 60 Hz). The function is
independent of the control mode (6- or 12-pulse or DCF mode). If used in 12 pulse mode
Master and Follower drive must have the same setting! (higher HL in S21.232)
3601 FB_P: I2
REV_GAP
Parameter of 12-PULSE LOGIC-function block
If the actual current doesn´t go down in parallel and as expected in both converters this
delay time is started when the time of REV_DELAY has elapsed to enable the system to
correct itself. During this time the reversal is blocked. The delay time is defined in multiples
of cycles (see REV_DELAY). The bridge reversal will be performed independent of the
actual current signal of the other converter, if the time has elapsed. The function is
independent of the control mode (6- or 12-pulse or DCF mode). This parameter must have
the same setting at the Master and the Follower. (higher HL in S21.232)
3602 FB_P: I2
FREV_DELAY
Parameter of 12-PULSE LOGIC-function block
This delay time is started when the polarity of the current reference is inverted. In case the
bridge reversal is successful this delay time is reset. In case the bridge reversal failed the
fault message F65 is displayed when the time is elapsed. A reversal may fail because only
one converter swapped the bridge or the converters swapped bridges crosswise or
something else. At the end the current is not increased at both converters with the same
bridge. This delay time is defined in multiples of cycles (see REV_DELAY). ). The function
is independent of the control mode (6- or 12-pulse or DCF mode). This parameter must
have the same setting at the Master and the Follower and must be greater than the sum of
REV_DELAY and REV_GAP plus a safety margin. (higher HL in S21.232)
3603 FB_P: I2
IACT_SLAVE
Input of 12-PULSE LOGIC-function block
Pointer to an analog hardware input. In default condition the analog input 2 is connected.
At converters working as a 12 pulse MASTER the actual current signal taken out of the
SLAVE has to be connected to the hardware and transferred to this input.
At converters working as a 12 pulse SLAVE the actual current signal taken out of the
MASTER has to be connected to the hardware and transferred to this input.
3604 FB_I: C4
DIFF_CURRENT
Parameter of 12-PULSE LOGIC-function block
Permitted difference of the currents (Master/Slave)
Operative only at the Master drive.
3605 FB_P: I2
SC: 1 HL: 500
SC: 1 HL: 5000
SC: 1 HL: 5000
SC: CCURR HL: 19999
SC: 1 HL: 50
DCS500 Pin and Parameter list
LL: 0 D: 1
LL: 0 D: 10
LL: 1 D: 10
LL: 0 D: 10107
LL: 5 D: 10
(S13/16 ).
U: -
(S13/16 ).
U: -
(S13/16 ).
U: -
(S13/16 ).
U: -
(S13/16 ).
U: %
A 63