Omron 8025G Maintenance Manual page 121

THEORY OF OPERATION
SECTION 4
With the parity switch in the off position, R5 and R4 are connected to +5
V dc. The resulting drop across R5 places a high level on pins 35 and 38 of XG3.
The high level pin 35 inhibits the parity generation and verification circuits in
XG3; the high level at pin 38 selects a character length of eight bits.
Setting the parity switch in the odd parity position (the position shown
on the schematic) disconnects RS and R4 from +5
V
dc. As a result, pin 35 is low
to enable the parity circuits in XG3. The low level at pin 38 selects a character
length (excluding parity) of seven bits. Pin 39 of XG3 is also low since R3 is not
connected to +5
V
dc. A low level at pin 39 selects odd pa~ity.
With the parity switch in the even parity position, R3 and R4 are connected
to
+5 V
dc, which drives pin 39 of XG3 high to select even parity. The levels at
pins 35 and 38 do not change from the odd parity levels.
4.4.13 Terminator Card
The terminator card provides resistive pull-ups and terminations for the
data bus and control lines in the terminal. A strapping block is also included to
program restart commands.
Block Diagram Analysis. As indicated by the block diagram in Figure 4-23,
all 'data bus, control, clock, and restart lines are terminated to prevent signal
~
deterioration. The location selector, a strapping block, provides for grounding
~
one or more of the restart lines to specify restart commands. A restart command
specifies the program memory location at which the program starts after an interrupt.
ADATABU S
B DATA IlU S
-
MA DATA BU S
S
OL
CLOCK
CDNTR
RESTART I 31
Figure 4-23.
~
~
~
TERMINATIN()
RESISTORS
...
..
RESTART
COMMAND
SELECTOR
':"
Terminator card block diagram.
Circuit Description. Refer to schematic diagram 96- 394-01 in Section 8.
Xl through X5 are resistance networks that provide resistance pull-ups and
terminations for the data bus and control lines driven with open-collector drivers.
The program restart address is determined by the El through E6 jumper ar-
rangement. With no jumpers in place (standard configuration), the program starts
at address 08 after an interrupt, and 10 8 after a
poe
(power on clear).
In the case of a POC, circuitry on the processor card (see Section 4.4.4)
holds RSTO high. Thus, one of only four POC restart addresses can be specified. One
of eight addresses, however, can be specified for other types of interrupts.
4-79