Status Bits - Omron 8025G Maintenance Manual

THEORY OF OPERATION
SECTION 4
plus a decoded command from XE4) , the CPU sets the status of the card and external
device. The status bits are defined in Table 4-11.
The remainder of the RS-232 card controls Baud Rate, data flow between the
external device and interface card, parity and word length, and the number of stop
bits to be transmitted.
The UA CLK circuit consists of two counter stages, XB3 and XB4.
(288 kHz) is divided in these counters to produce a UA CLK signal for XG3.
at
16
times the shift rate, is applied to the RCC and TRC (pins
17
and 40)
of XG3. -
Table 4-11. Status bits
STATUS BITS
ADBO
Receive line signal detector (CF)
ADBl Not used
ADB2
Not used
ADB3 Transmitter available if
Hi
not
-available if L
ADB4
Ring indicator (CE)
ADB5 Parity error
ADE6 Framing error
ADB7 OVerrun error
por·L Address Bits
ADBO H fer receive mode; L for transmit. mode
ADBl-4 Device address
ADB5 Parity error
ADB6 Framing error
ADB7 OVerrun error
4-77
RS CLK
UA CLK,
inputs