Adtec RD-71 User Manual page 27

10-bit 1080p integrated receiver decoder
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2200.
Vertical Adjust
Vertical adjustment defines the
difference in the SYNC IN VSYNC
and output VSYNC. Typically,
this should be in the range of 0
to +1 frame in lines. For
example, a 1080I output could
be adjusted from 0 to 1125.
Pixel Phase
Pixel Phase adjustment is a very
fine grain adjustment that can
adjust within a single clock. The
increments are 1/64th of a clock.
The valid range is 0 to 63.
Genlock Status
Shows if GENLOCK input is
currently being used for the
decoder or in FREE RUN mode
Genlock CVBS
This configuration is used
Out
generally with 3D applications.
The 'MASTER' unit CVBS
configuration must be configured
as 'SYNC'.
Genlock Reset
Reinitializes the Genlock System.
0 - 1125
0 - 63
VIDEO - CVBS output is video
SYNC - CVBS output is black burst
sync signal
27

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