Controlcircuitry; Digitalcircuitry; Display Circuitry; Powersui'i'lies - Keithley 199 Instruction Manual

PRINCIPLES OF OPERATION
5.5 CONTROL CIRCUITRY
The signals for the circuitry that provides control of the
various FETs, relays, analog switches and logic levels are
supplied by
the shift store
registers U29, U30, U31, and
U32 (see schematic 199-126, page 3). CLOCK, DATA and
STROBE signals are sent from the VIA (U8) across the
opto-isolators. ATl, AT2, and m (see schematic 199-126,
page 5). The isolators provide WOV isolation between the
analog and digital sections of the instrument. DATA is
serially loaded into~~the shift store registers and a STROBE~~
pulse causes the registers to simultaneously output~the ap-
propriate logic levels to the FET, analog switch and Ielay
drivers.
5.6 DIGITAL CIRCUITRY
The Model 199 is controlled by an
internal
microcomputer.
This section briefly describes
the
operation of the
microcomputer and associated digital circuitry. Refer to
schematic diagram number 199-106 for circuit details.
5.6.1 Microcomputer
The microcomputer centers around the g-bit 68B09
microprocessor. The MPU has direct control over the
display, front panel switches, A/D converter, IEEE-488 bus,
scanner, as well as the VOLTMETER COMPLETE Output
and the EXTERNAL TRIGGER Input. Timing for the
micm-@xessor is accomplished by the use of Yl; an 8MH.z
crystal. This frequency is divided down by four to obtain
a bus operating frequency of 2MHz by the MPU,~ UlO.
Instrument operation software is stored in the EPROM,
U4. Calibration constants, Translator words and inshument
set up conditions are stored in ETROM (U20). U9 is the
RAM. The chip selected is determined by the state of All,
Al2, Al3, Al4 and Al5 address lines. These address lines
determine which is selected by the decoder (Ul). Only one
device (ROM, RAM, VIA, etc) will have access to the data
bus at any one time.
The heart of the IEEE-488 circuitry is the General Purpose
Interface Bus Adapter (U5). The GPIBA is capable of per-
forming all IEEE talker-listener protocols. The bidirectional
data lines DO through D7 permit the transfer of data bet-
ween the microprtiessor and the GI'IBA. The transceivers
U6 and U7 are used to drive the output. Data is buffered
by U6 and U7 and is transmitted to the bus via connector
J7
6.6.2 Display Circuitry
The display information is
Sent
through display latches m6
and Ul5. Upon each display update, new segment infor-
mation is presented to the display latches and a clock pulse
is sent on PAO. Thedock pulse to U4 and U5 (see schematic
199-116) shifts a digit enable bit to the next digit to be
enabled. Every 10 times the display is updated, a digit
enable it is generated at PA1 and goes to the data input
of the shit register. Ull through UJ2 are the drivers for
the LED segments of the display digits and the LED
indi&tors.
5.7 POWER SUPPLIES
The main power supplies of the Model 199 are located on
sheet 5 of schematic drawing number W-126. Fuse F2 is
fhe line fuse which is accessible from the rear panel. 52
is the POWER ON/OFF switch and 53 sele& ll5V or 23OV
operation by placing the transformer primary windings in
parallel or series. The power transformer, Tl, has three
secondary windings; one for the c5V digital supply, one
for the +5V analog supply and one for the il5V analog
supply. CRl3, CR14 and CR15 provide fullwave rectifica-
tion for the three suoulies, while U5O throueh U53 oro-
vide the regulation: 'Supply filtering is p&formed by
CM-C60, C63, c65, and C72.
5.8
SCANNER
The optional Model 1992 Scanner Card allows the user to
multiplex eight, 2-pole inputs or four, 4-pole inputs. A
schematic diagram of the Model 1992 is shown on draw-
ing number 1992-W located at the end of Section Z The
main sections of the scanner card include the control and
relay circuits, as outlined below.
5.8.1 Control Circuitry
Control information for which channel should be closed
is transmitted in via the STROBE, DATA, and CLOCK lines
into U2. The control sequence is essentially the same as
that used for the main DMM circuitry discussed previous-
ly. The U2 output for the relay that is to be closed is set
low, while the remaining outputs are high so that only one
relay is closed at any given time.
Ul and associated components are included in order to
ensure that relays do not randomly close during power up.
5-10