System Architecture For 7026-6H1 Server - IBM RS/6000 SP Handbook

Clustered ibm eserver pseries systems
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Chipkill DIMMs for the 7026-6H1 provide the self-contained capability to correct
real-time, multi-bit DRAM errors, including complete DRAM failures. This "RAID
for memory" technology provides enhanced multi-bit error detection and
correction that is transparent to the system.
Figure 3-3 illustrates the system architecture for 7026-6H1 server.
8MB L2
SRAM
250 MHz
8MB L2
SRAM
250 MHz
System bus
128-bit @ 133.6 MHz
PCI bus 64-bit @ 66 MHz
Figure 3-3 System architecture for 7026-6H1 server
Product positioning
The 7026-6H1 consists of a rack-mounted CEC drawer containing the
processors and memory connected to another rack-mounted drawer containing
the media, hot-plug I/O slots, and optional boot bays. Both drawers have
redundant power options and redundant cooling. The incorporation of hot-plug
PCI I/O slots brings new and increased levels of availability for this system. The
need to power down and reboot when adding or replacing most PCI adapters is
106
RS/6000 SP and Clustered IBM ^ pSeries Systems Handbook
Memory quads, 1 to 32 GB ECC memory
Basic CPU card
RS64 IV
668 MHz
Memory
controller
RS64 IV
668 MHz
I/O
Hub
PCI
CTLR
S
S
S
S
S
S
L
L
L
L
L
L
O
O
O
O
O
O
T
T
T
T
T
T
1
2
3
4
5
6
Memory bus
64-bit @ 250 MHz
Addtional CPU card
RS64 IV
668 MHz
RS64 IV
668 MHz
RS64 IV
668 MHz
RS64 IV
668 MHz
I/O drawer unit
PCI
PCI
PCI
I/O Hub bus 64-bit @ 66 MHz
PCI
CTLR
CTLR
CTLR
CTLR
PCI slots:
S
S
S
S
S
S
S
S
64- bit @ 66 MHz, 3.3 Volt
L
L
L
L
L
L
L
L
O
O
O
O
O
O
O
O
32- bit @ 33 MHz, 5 Volt
T
T
T
T
T
T
T
T
9
10
11
12
13
14
7
8
CEC unit
8MB L2
SRAM
250 MHz
8MB L2
SRAM
250 MHz
8MB L2
SRAM
250 MHz
8MB L2
SRAM
250 MHz
Remote I/O bus
8-bit @ 500 MHz
DUPLEX

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