Intel 386 User Manual page 689

Embedded microprocessor
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INTEL386™ EX MICROPROCESSOR USER'S MANUAL
10-12
10-15
mode 3,
10-13
basic operation,
basic operation (odd count),
disabling the count,
writing a new count,
10-16
10-17
mode 4,
10-16
basic operation,
disabling the count,
writing a new count,
10-18
10-19
mode 5,
10-18
basic operation,
retriggering the strobe,
writing a new count,
10-5
10-19
operation,
operations caused by GATEn, 10-6
10-1
10-4
overview,
programming
10-33
considerations,
initializing the counters,
D-63
input and output signals,
reading the counter,
counter-latch command,
read-back command,
simple read,
5-13
10-21
TMRCFG,
,
10-25
TMRCON,
TMRn, 10-29, 10-32, D-64, D-65
writing the counters,
rate generator, See Mode 2
read-back commands, multiple,
4-16
register addresses,
10-4
registers,
10-30
TMRCON,
TMRn, 10-26
10-3
signals,
software-triggered strobe, See Mode 4
square wave, See Mode 3
8-9
Timing,
Timing diagram
basic external bus cycles,
basic internal and external bus cycles,
6-29
basic refresh cycle,
6-33
BS8 cycle,
10-7
counter mode 0,
10-9
counter mode 1,
,
Index-10
10-14
10-14
10-14
10-15
10-17
10-17
10-19
10-19
10-24–10-25
,
10-20
10-23
10-27
10-33
10-27
10-30
10-27
D-62
,
10-28
D-63
,
,
10-26
10-33
D-2
,
6-6
6-12
10-10
10-11
counter mode 2,
10-13
counter mode 3,
10-16
counter mode 4,
10-18
counter mode 5,
12-9
12-11
DMA transfer,
,
entering and leaving idle mode,
entering and leaving powerdown mode,
6-27
HALT cycle,
interrupt acknowledge cycle,
18-12
JTAG test-logic unit,
LOCK# signal during pipelining,
nonpipelined read cycle,
nonpipelined write cycle,
6-21
pipelined cycles,
refresh cycle during HOLD/HLDA,
13-15
SSIO receiver,
13-11
SSIO transmitter,
U
Units of measure, defined,
V
9-8
Virtual-86 mode,
W
17-1
Watchdog timer unit,
17-2
block diagram,
design considerations,
17-6
disabling the WDT,
17-4
lockout sequence,
17-3
17-4
operation,
during idle mode,
17-1
17-2
overview,
17-5
17-6
programming,
bus monitor mode,
general-purpose timer mode,
software watchdog mode,
17-8
WDTCNTH,
17-8
WDTCNTL,
17-10
WDTRLDH,
17-10
WDTRLDL,
17-9
WDTSTATUS,
4-18
register addresses,
10-12
,
10-14
10-15
,
,
10-17
,
10-19
,
12-21
,
8-9
8-11
6-25
9-29
,
18-13
,
6-35
6-15
6-18
6-30
1-3
17-16
17-12
8-5
17-5
17-4
17-5
D-67
,
D-67
,
D-68
,
D-68
,
D-69
,
D-4
,

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