Table of Contents
Advertisement
Table A-4 lists the states of output and bidirectional pins after reset and during idle mode, pow-
erdown, and hold.
Table A-4. Pin States After Reset and During Idle, Powerdown, and Hold (Sheet 1 of 2)
Symbol
A25:1
ADS#
BHE#
BLE#
CAS2:0
CLKOUT
CS4:0#
CS6:5#
D15:0
DACK1:0#
D/C#
DTR1:0
EOP#
HLDA
LBA#
LOCK#
M/IO#
P1.5:0
P1.7:6
P2.4:0
P2.6:5
P2.7
P3.7:0
PWRDWN
RD#
READY#
REFRESH#
RTS1#
RTS0#
SMIACT#
SRXCLK
SSIOTX
NOTES:
1.
X if clock source is internal; Q if clock source is external.
2.
Q when shifting data out through the JTAG port, otherwise Z.
Type
Reset
O
1
O
1
O
0
O
0
O
1
O
Q
O
WH
O
1
I/O
Z
O
1
O
1
O
WH
I/OD
WH
O
WL
O
1
O
WH
O
0
I/O
WH
I/O
WL
I/O
WH
I/O
WL
I/O
WH
I/O
WL
O
WL
O
1
I/O
Z
O
1
O
WL
O
WH
O
1
I/O
WH
O
WL
SIGNAL DESCRIPTIONS
Pin State
Idle
Powerdown
1
1
1
1
X
0
X
1
1
1
Q
0
Q
X
Q
X
Z
Z
Q
X
0
0
X
X
Z
Z
Q
X
Q
X
X
X
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
1
Z
Z
Q
X
X
X
X
X
X
X
(1)
Q
X or Q
(1)
Q
X or Q
Hold
Z
Z
Z
Z
Z
Q
1
1
Z
1
Z
X
Z
1
1
Z
Z
X
X
X
X
X
X
Q
1
Z
1
X
X
1
Q
Q
A-9
- Quick Links:
- Manual Contents
Hide quick links:
Advertisement
Table of Contents
