Intel 386 User Manual page 675

Intel386™ EX EMBEDDED MICROPROCESSOR USER'S MANUAL
PC/AT Address Space
Pipelining
Powerdown Mode
RCU
Reserved Bits
Set
SIO Unit
SMM
SMRAM
SSIO Unit
Glossary-4
Addresses 0H–03FFH. The internal timers, interrupt
controller, serial I/O ports, and DMA controller can
be mapped into this space. In this manual, the terms
DOS address and PC/AT address are synonymous.
A bus interface technique that controls the address
and status outputs so the outputs for the next bus cycle
become valid before the end of the current bus cycle,
allowing external bus cycles to overlap. By increasing
the amount of time available for external memory or
I/O devices to respond, pipelining allows systems to
achieve high bandwidth with relatively slow,
inexpensive components.
The power conservation mode that freezes both the
core clocks and the peripheral clocks.
Refresh control unit. The module that simplifies the
interface between the processor and DRAM
components by providing the necessary bus control
and timing for refresh operations.
Register bits that are not used in this device but may
be used in future implementations. Avoid any
software dependence on these bits.
The term set refers to the value of a bit or the act of
giving it a value. If a bit is set, its value is "1"; setting
a bit gives it a "1" value.
Serial input/output unit. The internal peripheral that
allows the system to communicate with external
peripheral devices and modems.
System management mode. The hardware and
software enhancement that reduces system power
consumption by allowing the device to execute
specific routines for power management.
A 32-Kbyte memory partition (38000H–3FFFFH)
used for SMM. The upper 512 bytes (3FE00H–
3FFFFH) are reserved for the CPU and must reside in
RAM; the remainder of the partition is used for user-
supplied driver code and may reside in read-only
storage.
Synchronous serial input/output unit. The internal
peripheral that provides 16-bit bidirectional serial