Intel 386 User Manual page 235

Intel386™ EX EMBEDDED MICROPROCESSOR USER'S MANUAL
_IRQ_SlaveBase_ = SlaveBase & 0xf8;
_SetEXRegByte(ICW1S, 0x11 | SlaveMode);
_SetEXRegByte(ICW2S, _IRQ_SlaveBase_); // Set slave base interrupt
_SetEXRegByte(ICW3S, 0x2);
_SetEXRegByte(ICW4S, 0x1);
cfg_pins = _GetEXRegByte(INTCFG);
cfg_pins |= SlavePins;
_SetEXRegByte(INTCFG, SlavePins);
return E_OK;
}/* InitICUSlave */
/*****************************************************************************
Disable8259Interrupt:
Description:
Disables 8259a interrupts for the master and the slave.
Parameters:
MstrMask
SlaveMask
Each bit location that is set disables the corresponding
interrupt (by setting the bit in the interrupt control register).
For example, to disable master IR3 and IR5 set MstrMask = 0x28
(bits 3 and 5 are set).
Returns:
None
Assumptions:
REMAPCFG register has Expanded I/O space access enabled (ESE bit set).
Syntax:
/* ICU IRQ Mask Values*/
#define IR0
#define IR1
#define IR2
#define IR3
#define IR4
#define IR5
#define IR6
9-36
// type, least 3-bit must be 0
// Set slave ID
// Set bit 0 to guarantee
// operation
// Set Slave external interrupt
// pins
Mask value for master ICU
Mask value for slave ICU
0x1
0x2
0x4
0x8
0x10
0x20
0x40
// Set slave triggering