Canon BJ-W7000 Service Manual page 50

CHAPTER 2 OPERATION mm
C. Image Controller Control
i)
External parallel
'
.
®
®
1
imeriace
8-bit parallel
@
DRAM
oe
controller
FIFO
(U708,709
1
(U801)
(U805)
U710,U711)
(U731)
g g H
s/,2]
4/8
|
Ba
o =a
1 y710
8 a s
ges
5 2omHz
5/°s
3|°s
eae
<
Image data V/F
(8-bit)
®
Gate arrey
(U719)
Communications
Engine controller PCB
Address bus
32-bit data bus
1
1
1
1
F
1
1
1
i)
\
Address bus :
JL:
16-bit 2 OF ost
4 EPROM "T 25MHz \
data bus (XU701) a
@ Reset IC
cPU (U701)
Address bus 1
®
1
i)
1
1
1
1
1
1
1
{
1
1
32-bit
data bus
Address bus
(U713)
Timer
(U718)
y702 ob
14.7MHz 5
IU714,U716)
EEPROM
(U724)
8-bit © Operation
Decoder PCB
(U706)
Figure 2-102
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