Mitsubishi Electric MELSEC iQ-R RD78G4 User Manual page 175

■Synchronous control system control data
Item
[Cd.380] Synchronous control start
[Cd.381] Synchronous control analysis mode
■Synchronous encoder axis control data
j: Synchronous encoder axis No. - 1
Item
[Cd.320] Synchronous encoder axis control start
[Cd.321] Synchronous encoder axis control method
[Cd.322] Synchronous encoder axis position value setting address
[Cd.323] Synchronous encoder axis error reset
[Cd.324] Connection command of synchronous encoder via CPU
[Cd.325] Input value for synchronous encoder via CPU
■Control data for synchronous control
n: Axis No. - 1
Item
[Cd.400] Main shaft clutch command
[Cd.401] Main shaft clutch control invalid command
[Cd.402] Main shaft clutch forced OFF command
[Cd.403] Auxiliary shaft clutch command
[Cd.404] Auxiliary shaft clutch control invalid command
[Cd.405] Auxiliary shaft clutch forced OFF command
[Cd.406] Synchronous control change request
[Cd.407] Synchronous control change command
[Cd.408] Synchronous control change value
[Cd.409] Synchronous control reflection time
Fetch cycle
Operation cycle
At operation start (Synchronous control)
Fetch cycle
Operation cycle
At operation start (Synchronous encoder
control)
At operation start (Synchronous encoder
control)
Main cycle
Main cycle
Operation cycle
Fetch cycle
Operation cycle
Operation cycle
Operation cycle
Operation cycle
Operation cycle
Operation cycle
Operation cycle
At request (Synchronous control change
request)
At request (Synchronous control change
request)
At request (Synchronous control change
request)
Appendix 1 List of Buffer Memory Addresses (for Synchronous Control)
Buffer memory address
Axis 1 to axis 16
36320
36322
Buffer memory address
Axis 1 to axis 16
35040+10j
35041+10j
35042+10j
35043+10j
35044+10j
35045+10j
35046+10j
35047+10j
Buffer memory address
Axis 1 to axis 16
44080+20n
44081+20n
44082+20n
44083+20n
44084+20n
44085+20n
44086+20n
44087+20n
44088+20n
44089+20n
44090+20n
APPX
173
A