Mitsubishi MELSEC-Q Series User Manual page 192

4
COMMUNICATIONS BETWEEN CPU MODULES
Multiple CPU high
speed transmission area
High (2) Parameter setting
Process Basic
Performance
Note4.9
Universal
UD
Note4.9
Note9
High
Process
Basic
Performance
Note4.9
Universal
UD
Note4.9
4
- 42 4.1 Communications between CPU modules using CPU shared memory
4.1.4 Communication using CPU shared memory by program
(c) Memory configuration of multiple CPU high speed transmission area
1) Addresses of user setting area
The addresses of user setting area depend on the CPU module.
For user setting area addresses, refer to Section 4.1.1.
2) Addresses of multiple CPU high speed transmission area
The following explains the memory configuration of the multiple CPU high
speed transmission area that is used in the multiple CPU high speed
transmission function. (For the CPU shared memory, refer to Section 4.1.1.)
U3E0\G10000
to
U3E1\G10000
to
U3E2\G10000
to
U3E3\G10000
to
* 1:Indicates addresses when user setting area for each CPU is specified using multiple CPU devices.
Diagram 4.42 Memory configuration of multiple CPU high speed transmission area
For the each area of the multiple CPU high speed transmission area, refer to
Section 4.1.3.
When performing the auto refresh of the multiple CPU high speed transmission area,
the number of points to be sent by each CPU module is set in the PLC parameter
"Multiple CPU settings."
For the setting description of the parameter, refer to Section 4.1.3.
Note9
For the High Performance model QCPU, Process CPU, Basic model QCPU, Q02UCPU,
parameter setting can be ignored since the user setting area of the multiple CPU high speed
transmission area is not available.
*1
CPU No.1 send range
*1
CPU No.2 send range
*1
CPU No.3 send range
*1
CPU No.4 send range
Note4.9
User setting area
Auto refresh area