Mitsubishi MELSEC-Q Series User Manual page 169

4
COMMUNICATIONS BETWEEN CPU MODULES
Setting of CPU No.1
Setting of CPU No.3
CPU No.1
Device
D0
to
D9
D10
to
D19
D20
to
D29
D100
to
D109
(Example 2) When setting not to perform unnecessary refresh
The following shows the example performing auto refresh between
each CPU from No.2 to No.4 and CPU No.1 only.
By leaving the device column of other CPUs of which auto refresh is
not required in blank, it is possible to set not to perform unnecessary
refresh.
The device column of the host CPU cannot be left in blank.
Diagram 4.19 Setting of CPU device
CPU No.2
Device
D0
to
D9
D100
to
D109
Diagram 4.20 Outline of auto refresh operation
4.1 Communications between CPU modules using CPU shared memory
4.1.2 Communication by auto refresh using CPU shared memory
Setting of CPU No.2
Setting of CPU No.4
CPU No.3
Device
D0
to
D9
D100
to
D109
CPU No.4
Device
D0
to
D9
D100
to
D109
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