Mitsubishi MELSEC-Q Series User Manual page 186

4
COMMUNICATIONS BETWEEN CPU MODULES
(4) Precautions
<Parameter setting>
CPU No.1 auto refresh setting
Data communication
range for each CPU
CPU Transfer
No. No.
Number
of
points
Transfer 1 2
CPU
No.1
Transfer 2 10
CPU
Transfer 1 2
No.2
4
- 36 4.1 Communications between CPU modules using CPU shared memory
4.1.3 Communication by auto refresh using multiple CPU high speed transmission area
(a) Local device setting
Device ranges set for the use of the auto refresh cannot be set to local devices.
If set, the refresh data will not be updated.
(b) Setting for using the same file name as the program in the file register
Do not set devices for the use of the auto refresh in the file register for each
program.
If set, auto refresh will be performed on the file register that corresponds to the
last scan execution type program executed.
(c) Transmission delay time
Data transmission delay time due to auto refresh is from 0.09 ms to (1.80 +
(Sending side scan time + Receiving side scan time
(d) Assurance of data sent between CPUs
Due to the timing of data send from the host CPU and auto refresh in any of other
CPUs, old data and new data may be mixed (data separation) in each CPU.
The following shows the methods for avoiding data separation at communications
by auto refresh.
1) 32-bit data separation
Transfer data with auto refresh method in units of 32 bits. Since auto refresh is
set in units of 32 bits, 32-bit data does not separate.
2) Data consistency for data exceeding 32 bits
In auto refresh method, data are read in descending order of the setting
number in auto refresh setting parameter.
Transfer data separation can be avoided by using the transfer number lower
than the transfer data as an interlock device.
Diagram 4.38 shows a program example for interlocking between CPU No.1
and CPU No.2.
Table4.10 Example for parameter setting for interlock program
Device setting
for data
communication
Start End Start End
0 1 M0 M31
2 11 D0 D9
0 1 M32 M63
In the above parameter settings, use M0 as an interlock device for CPU No.1
(data setting completion bit) and M32 as an interlock device for CPU No.2
(receive data processing completion bit).
CPU No.2 auto refresh setting
CPU Transfer
Direction
No. No.
Transfer 1
CPU
No.1
Transfer 2
CPU
Transfer 1
No.2
2)) ms.
Device setting
CPU specific send range
communication
Number
of Start End Start
points
2 0 1 M0
10 2 11 D100
2 0 1 M32
for data
End
M31
D109
M63