Cpu Control Registers; Data Registers (D0, D1, D2, D3; Address Registers (A0, A1 - Panasonic MN101L Series User Manual

2.1.1

CPU Control Registers

The LSI allocates the peripheral circuit registers in memory space ("0x03000" to "0x03FFF").
CPU control registers are also allocated in the space.
Symbol Address
CPUM 0x03F00
MEMCTR 0x03F01
CKCTR 0x03F04
AUCTR 0x03F07
SBNKR 0x03F0A
DBNKR 0x03F0B
NMICR 0x03FE1
0x03FE2
xxxICR
0x03FFE
2.1.2

Data Registers (D0, D1, D2, D3)

Data registers D0 to D3 are 8-bit general-purpose registers.
The four data registers can be paired to form the 16-bit data registers DW0 (D0, D1) and DW1 (D2, D3).
The initial value of Dn is "0x00".
2.1.3

Address Registers (A0, A1)

These registers are used as address pointers specifying data locations. The initial value of An is "0x0000".
Table:2.1.2 CPU Control Registers
R/W
R/W CPU mode control register
R/W Memory control register
R/W Clock control register
W Extended calculation control register
R/W Bank register for source address
R/W Bank register for destination address
R/W Non-maskable interrupt control register
to R/W Maskable interrupt control register
15
Data register
Figure:2.1.1 Data Registers
Address register
Figure:2.1.2 Address Registers
Register name
8 7 0
D1 D0
D3 D2
15
A0
A1
Pages
DW0
DW1
0
Overview
Chapter 2
CPU
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