13.2 Control Registers
Registers of SCIFn and baud rate timer (hereafter indicated as BRTMn) that generates a transfer clock are shown
in Table:13.2.1.
13.2.1
Registers
Register
symbol
SC0MD0
SC0MD1
SC0MD2
SC0MD3
SCIF0
SC0STR
RXBUF0
TXBUF0
SC01SEL
SC1MD0
SC1MD1
SC1MD2
SC1MD3
SCIF1
SC1STR
RXBUF1
TXBUF1
SC01SEL
SC2MD0
SC2MD1
SC2MD2
SC2MD3
SC2AD
SCIF2
SC2STR
SC2IICSTR
RXBUF2
TXBUF2
SC23SEL
Table:13.2.1 Serial Interface Control Registers
Address
Access
0x03E30
R/W
SCIF0 Mode Register 0
0x03E31
R/W
SCIF0 Mode Register 1
0x03E32
R/W
SCIF0 Mode Register 2
0x03E33
R/W
SCIF0 Mode Register 3
0x03E34
R
SCIF0 Status Register
0x03E35
R
SCIF0 Reception Data Buffer
0x03E36
R/W
SCIF0 Transmission Data Buffer
0x03F1C
R/W
SCIF01 I/O Pin Switching Control Register
0x03E40
R/W
SCIF1 Mode Register 0
0x03E41
R/W
SCIF1 Mode Register 1
0x03E42
R/W
SCIF1 Mode Register 2
0x03E43
R/W
SCIF1 Mode Register 3
0x03E44
R
SCIF1 Status Register
0x03E45
R
SCIF1 Reception Data Buffer
0x03E46
R/W
SCIF1 Transmission Data Buffer
0x03F1C
R/W
SCIF01 I/O Pin Switching Control Register
0x03E50
R/W
SCIF2 Mode Register 0
0x03E51
R/W
SCIF2 Mode Register 1
0x03E52
R/W
SCIF2 Mode Register 2
0x03E53
R/W
SCIF2 Mode Register 3
0x03E54
R/W
SCIF2 Address Setting Register
0x03E56
R/W
SCIF2 Status Register
0x03E57
R/W
SCIF2 Status Register for IIC dedicated
0x03E58
R
SCIF2 Reception Data Buffer
0x03E59
R/W
SCIF2 Transmission Data Buffer
0x03F1D
R/W
SCIF23 I/O Pin Switching Control Register
Register name
Control Registers
Chapter 13
Serial Interface
Page
XIII-11
XIII-13
XIII-15
XIII-17
XIII-19
XIII-10
XIII-10
XIII-9
XIII-11
XIII-13
XIII-15
XIII-17
XIII-19
XIII-10
XIII-10
XIII-9
XIII-12
XIII-14
XIII-16
XIII-18
XIII-22
XIII-20
XIII-21
XIII-10
XIII-10
XIII-9
XIII - 7