QUANTA QuantaGrid S31A-1U User Manual page 46

Quantagrid series compact 1u server with full feature
Table of Contents

Advertisement

BIOS
Table 10: Terminology (Continued)
Term
DMA
Direct Memory Access.
DMI
Direct Media Interface – connection from the processor to the PCH.
DRAM
Dynamic Random Access Memory, memory chips from which DIMMs are constructed.
Driver Execution Environment. Component of Intel® Platform Innovation Framework for
DXE
EFI architecture.
Error Correction Code. Refers to a memory system that has extra bit(s) to support limited
ECC
detection/correction of memory errors.
EEPROM
Electrically Erasable Programmable Read Only Memory – called "Flash memory".
EFI
Extensible Firmware Interface (see also UEFI).
EHCI
Enhanced Host Controller Interface, a USB controller standard.
Flash
Short for "Flash Memory", solid-state memory based on EEPROMs.
FRU
Field Replaceable Unit.
FV
Firmware Volume.
GbE
Gigabit Ethernet, an Ethernet connection operating at gigabit/second speed.
GUID
Globally Unique Identifier.
A "HotKey" is a key combination recognized as an unprompted command input. For
HotKey
example, pressing <F2> during POST will take the operator to the Setup Utility.
HT
Intel® Hyper-Threading Technology.
IBMC
Integrated Baseboard Management Controller.
ICH
I/O Control Hub, a chipset component.
IDE
Integrated Drive Electronics, a disk interface standard.
IIO
Integrated I/O – I/O controller integrated into the processor chip.
IMC
Integrated Memory Controller – memory controller integrated into the processor chip.
INTR
Interrupt Request.
I/O
Input/Output.
Intelligent Platform Management Interface – an industry standard that defines standard-
IPMI
ized, abstracted interfaces to platform management hardware.
IRQ
Interrupt Request.
Keyboard, Video, and Mouse – an attachment that mimics those devices, and connects
KVM
them to a remote I/O user.
LAN
Local Area Network.
LED
Light Emitting Diode.
Load Reduced DIMM memory modules have buffer registers for both address and data
LRDIMM
between the SDRAM modules and the system's memory controller.
MCA
Machine Check Architecture.
MCE
Machine Check Exception.
MMIO
Memory Mapped I/O.
MRC
Memory Reference Code.
Description
BIOS U
U
PDATE
TILITY
2-17

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents