Radyne DMD2401 LB Installation And Operation Manual page 83

User Interfaces
<1> Drop Backward
Alarm Mask
<1> ForceSatBack
<30> Drop Edit Map
<1> Revision Number
<1> Alarm 1 Major
Alarm
<1> Alarm 2 Minor
Alarm
<1> Common Alarm
<1> Latched Alarm 1
Major Alarm
4-46
DMD2401 LB/ST L-Band Satellite Modem and ODU Driver
Bit 5 = Terrestrial MFAS Alarm Received (PCM-30 and PCM-
30C only)
Bit 6 = Loss of T4errestrial Signaling (reported by DSP)
Bit 7 = Spare
Bit 0 = Backward Alarm Received from Drop Terrestrial
Bits 2 – 7 = Spares
Force D&I Satellite Backward Alarm to be transmitted
Edit mapping of Satellite channels to dropped Terrestrial Time
Status Bytes
Decimal Point Implied
Bit 0 = Transmit Processor Fault Major Alarm
Bit 1 = Transmit Output Power Level Fault
Bit 2 = Transmit Oversample PLL Lock Fault
Bit 3 = Transmit Composite Clock PLL Lock Fault
Bit 4 = IF Synthesizer Lock Fault
Bit 5 = Transmit FPGA Configuration Fault
Bit 6 = Transmit Forced Alarm
Bit 7 = External Reference PLL Lock Fault
(0 = Pass, 1 = Fail)
Bit 0 = Terrestrial Clock Activity Detect Fault Minor Alarm
Bit 1 = Internal Clock Activity Detect Fault
Bit 2 = Tx Sat Clock Activity Detect Fault
Bit 3 = Tx Data Activity Detect Fault
Bit 4 = Terrestrial AIS (Tx Data AIS Detect Fault)
Bit 5 = Transmit Ext BNC Clock Activity Detect Fault
Bit 6 = Transmit Reed-Solomon Fault
Bit 7 = Tx BUC Fault, LBST Only
(0 = Pass, 1 = Fail)
Bit 0 = -12 V Alarm
Bit 1 = +12 V Alarm
Bit 2 = +5 V Alarm
Bit 3 = Temperature Fault
Bit 4 = Interface FPGA
Bit 5 = Battery Fault
Bit 6 = RAM/ROM Fault
Bit 7 = Spare
(0 = Pass, 1 = Fail)
Bit 0 = Transmit Processor Fault Major Alarm
Bit 1 = Transmit Output Power Level Fault
Bit 2 = Transmit Oversample PLL Lock Fault
Bit 3 = Composite Clock PLL Lock Fault
Bit 4 = IF Synthesizer Lock Fault
Bit 5 = Transmit FPGA Configuration Fault
Bit 6 = Transmit Forced Alarm
Bit 7 = External Reference PLL Lock Fault
(0 = Pass, 1 = Fail)
TM075 – Rev. 1.3