Radyne DMD2401 Operation Manual page 129

User Interfaces
Opcode: <240Fh>
<1> Year
<1> Month
<1> Day
Opcode: <2410h>
<1> Year
<1> Month
<1> Day
<1> Hour
<1> Minute
<1> Second
Opcode: <240Ah>
<1> Modulator Alarm
1 Major Alarm
<1> Modulator Alarm
2 Minor Alarm
<1> Modulator
Common Alarm
<1> Demodulator
4-90
DMD2401/DMD2401L/DMD2401 IBS/IDR Satellite Modem
Query Date
Query response
0 – 99
0 – 11
0 – 30
Query Time and Date
Query response
0 – 99
0 – 11
0 – 30
0 – 23
0 – 59
0 – 59
Query Time and Date
Query Response
Bit 0 = Transmit Processor Fault
Bit 1 = Transmit Output Power Level Fault
Bit 2 = Transmit Oversample PLL Lock Fault
Bit 3 = Composite Clock PLL Lock Fault
Bit 4 = IF Synthesizer Lock Fault
Bit 5 = Transmit FPGA Configuration Alarm Fault
Bit 6 = Transmit Forced Alarm
Bit 7 = External Reference PLL Lock Fault
(0 = Pass, 1 = Fail)
Bit 0 = Terrestrial Clock Activity Detect Fault
Bit 1 = Internal Clock Activity Detect Fault
Bit 2 = Tx Sat Clock Activity Detect Fault
Bit 3 = Tx Data Activity Detect Fault
Bit 4 = Terrestrial AIS (Tx Data AIS Detect Fault)
Bit 5 = Transmit Ext BNC Clock Activity Detect Fault
Bit 6 = Transmit Reed-Solomon Fault
Bit 7 = Tx BUC Fault, LBST Only
(0 = Pass, 1 = Fail)
Bit 0 = -12 V Alarm
Bit 1 = +12 V Alarm
Bit 2 = +5 V alarm
Bit 3 = Temperature Fault
Bit 4 = Interface FPGA Fault
Bit 5 = Battery Fault
Bit 6 = RAM/ROM Fault
Bit 7 = Spare
(0 = Pass, 1 = Fail)
Bit 0 = Receive Processor Fault
TM065 – Rev. 3.3