A/D And D/A Control/Status Register - VersaLogic Copperhead VL-EBX-41 Reference Manual

Intel 3rd generation core quad or dual core sbc with ethernet, hd graphics, acpi 4.0, sata, raid, usb, eusb, msata, sumit, hd audio, serial, analog + digital i/o, and spx
Table of Contents

Advertisement

A/D and D/A Control/Status Register

This register is used to control A/D and D/A conversion.
ADCONSTAT (Read/Write) CAFh
D7
Reserved
Bit
Mnemonic
D7-D6
Reserved
D5
DACLDA1
D4
DACLDA0
D3
ADCBUSY1
D2
ADCBUSY0
D1
ADCONVST1
D0
ADCONVST0
EBX-41 Reference Manual
D6
D5
Reserved
DACLDA1
DACLDA0
Table 35: A/D, D/A Control/Status Register Bit Assignments
Description
These bits are reserved. Only write 0 to these bits and ignore all read values.
This is a write-only (pulsed) bit. When a '1' is written it will strobe the LDAC signal
on the LTC2634 D/A Converter for channels 4-8. Writing a '0' is ignored. LDAC is
only used to update all 4 channels in one operation.
This is a write-only (pulsed) bit. When a '1' is written it will strobe the LDAC signal
on the LTC2634 D/A Converter for channels 1-4. Writing a '0' is ignored. LDAC is
only used to update all 4 channels in one operation.
This read-only status bit returns the conversion status for the LTC1857 A/D for
channels 9-16
0 – A/D is idle.
1 – A/D is busy doing a conversion.
This read-only status bit returns the conversion status for the LTC1857 A/D for
channels 1-8
0 – A/D is idle.
1 – A/D is busy doing a conversion.
This is a write-only (pulsed) bit. When a '1' is written it will start a conversion on
the LTC1857 A/D converter for channels 9-16. Writing a '0' is ignored.
This is a write-only (pulsed) bit. When a '1' is written it will start a conversion on
the LTC1857 A/D converter for channels 1-8. Writing a '0' is ignored.
D4
D3
ADCBUSY1
ADCBUSY0 ADCONVST1 ADCONVST0
Special Registers
D2
D1
D0
67

Advertisement

Table of Contents
loading

Table of Contents