Bios And Jumper Status Register - VersaLogic Lion VL-EPMe-42 Reference Manual

BIOS and Jumper Status Register

Table 6: SCR –Status/Control Register
Bit Identifier
BIOS_JMP
7
BIOS_OR
6
BIOS_SEL
5
LED_DEBUG
4
WORKVER
3
RESERVED
2
GPI_JMP
1
RESERVED
0
This corresponds to the setting of position 6 of the SW1 Configuration Switch block. Refer to the
Note:
EPMe-42 Hardware Reference Manual for more information regarding the configuration switches.
The table below summarizes the modes related to BIOS_OR and BIOS_SEL and the BIOS Configuration
Switch 6. The external BIOS selection is determined by the combination of the FPGA BIOS selection
signals and the BIOS Configuration Switch. This allows the BIOS Configuration switch to still be used to
select the Secondary BIOS no matter what the internal FPGA settings are or when the FPGA is not
programmed (i.e., setting the BIOS Configuration to the "ON" position will always select the Secondary).
Lion (VL-EPMe-42) Programmer's Reference Manual
Access Default
Status of the external BIOS switch (jumper):
RO
N/A 1 – Primary BIOS selected
0 – Secondary BIOS selected
BIOS Switch (jumper) Override
0 – BIOS Select will follow the BIOS_JMP switch setting. (Note)
R/W
0
1 – BIOS Select will follow the BIOS_SEL register setting
Note: See Table 7
BIOS Select (see BIOS_OR):
1 – Primary BIOS selected
R/W
0
0 – Backup BIOS selected
Note: See Table 7
Debug LED (controls the yellow LED):
R/W
0 0 – LED is off and follows its primary function (MSATA_DAS)
1 – LED is on (indicates FPGA is programmed by default)
Status used to indicate that the FPGA is not officially released
and is still in a working state.
RO
N/A
0 – FPGA is released
1 – FPGA is in a working state (not released)
RO
N/A Reserved. Writes are ignored; reads always return 0.
Status of the GPI Jumper (switch):
RO
N/A 0 – Switch is Off
1 – Switch is On
RO
0 Reserved. Writes are ignored; reads always return 0.
FPGA Registers
Description
9