Special Control Register - VersaLogic EPM-CPU-10 Reference Manual

Special Control Register

SCR (READ/WRITE) 00E0h (or 01E0h via CMOS Setup)
D7 D6
LED OVERTEMP
Bit Mnemonic
D7 LED
D6 OVERTEMP
D5 GPI
D4 GPO
D3 HDOGNMI
D2 WDOGSTA
D1 WDOGNMI
D0 WDOGRST
EPM-CPU-10 Reference Manual
D5 D4
GPI GPO
Table 20: Special Control Register Bit Assignments
Description
Light Emitting Diode — Controls the programmable LED connected to
JS4[27A/28A]
LED = 0 Turns LED off.
LED = 1 Turns LED on.
Temperature Status — Indicates CPU case temperature.
TEMP = 0 CPU case temperature is below value set in CMOS Setup
TEMP = 1 CPU case temperature is above value set in CMOS Setup
Note! This bit is a read-only bit.
General Purpose Input — Indicates the status of TTL input at JS3[38B].
GPI = 0 Logic High
GPI = 1 Logic Low
Note! This bit is a read-only bit.
General Purpose Output — Controls TTL output at JS3[37B].
GPO = 0 Logic High
GPO = 1 Logic Low
Non-Maskable Interrupt Enable — Controls the generation of Non-Maskable
Interrupts whenever the CPU temperature sensor detects an over-temperature
condition.
HDOGNMI = 0 Disable
HDOGNMI = 1 Enable
WDOG STATUS — Indicates if the watchdog timer has expired.
WDOGSTA = 0 Timer has not expired.
WDOGSTA = 1 Timer has expired.
Watch Dog Non-Maskable Interrupt Enable — Enables the generation of a
Non-maskable interrupt when the watchdog timer expires.
WDOGNMI = 0 Disables
WDOGNMI = 1 Enables
Watch Dog Reset Enable — Enables and disables the watchdog timer reset
circuit.
WDOGRST = 0 Disables the watchdog timer.
WDOGRST = 1 Enables the watchdog timer.
D3 D2
HDOGNMI WDOGSTA
Special Control Register
D1 D0
WDOGNMI WDOGRST
Reference – 41