Fpga Register Descriptions; Product Information Registers; Table 6: Pcr - Product Code And Led Register; Table 7: Psr - Product Status Register - VersaLogic SandCat Programmer's Reference Manual

FPGA Register Descriptions

R/W
RO
R/WC
RSVD Reserved. Only write 0 to this bit; ignore all read values.
P I
RODUCT NFORMATION
This register drives the PLED on the paddleboard. It also provides read access to the product
code.
Table 6: PCR – Product Code and LED Register
Bit Identifier
7 PLED
6-0 PRODUCT_CODE
Table 7: PSR – Product Status Register
Bit Identifier
7:3 REV_LEVEL[4:0]
2 EXTEMP
1 CUSTOM
0 BETA
EPM-39 Programmer's Reference Manual
Register Access Key
Read/Write
Read-only (status or reserved)
Read-status/Write-1-to-Clear
R
EGISTERS
Access Default
Drives the programmable LED on the paddleboard.
R/W 0 0 – LED is off (default)
1 – LED is on (can be used by software)
RO
0010001 Product Code for the EPM-39 (0x11)
Access Default
Revision level of the PLD (incremented every FPGA release)
0 – Indicates production release revision level when BETA
RO
N/A status bit (bit 0) is set to '0'
1 – Indicates development release revision level when BETA
status bit (bit 0) is set to '1'
Extended or Standard Temp Status (set via external resistor):
RO
N/A 0 – Standard Temp
1 – Extended Temp (probably always set)
Custom or Standard Product Status (set in FPGA):
RO
N/A 0 – Standard Product
1 – Custom Product or PLD/FPGA
Beta or Production Status (set in FPGA):
RO
N/A 1 – Beta (or Debug)
0 – Production
Description
Description
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