VersaLogic Copperhead VL-EBX-41 Reference Manual page 49

Intel 3rd generation core quad or dual core sbc with ethernet, hd graphics, acpi 4.0, sata, raid, usb, eusb, msata, sumit, hd audio, serial, analog + digital i/o, and spx
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MOV
OUT
MOV
MOV
OUT
MOV
MOV
OUT
CALL
;Write 55h to MCP23S17 register GPIOA
MOV
MOV
OUT
MOV
MOV
OUT
MOV
MOV
OUT
CALL
BUSY: MOV
IN
AND
JNZ
Reading a Digital I/O Port Using the SPI Interface
The following code example reads the DIO15-DIO8 input lines.
'REGISTER ASSIGNMENT
'---------------------
CONST SPICONTROL1 = &HCA8
CONST SPICONTROL2 = &HCA9
CONST SPISTATUS = &HCA9
CONST SPIDATA1 = &HCAB
CONST SPIDATA2 = &HCAC
CONST SPIDATA3 = &HCAD
'INITIALIZE SPI CONTROLLER
'================================
'SPICONTROL1 Register
'---------------------------
'D7 CPOL
'D6 CPHA
'D5 SPILEN1
'D4 SPILEN0
'D3 MAN_SS
'D2 SS2
'D1 SS1
'D0 SS0
OUT SPICONTROL1, &H26
'SPICONTROL2 Register
'---------------------------
'D7 IRQSEL1
'D6 IRQSEL0
'D5 SPICLK1
'D4 SPICLK0
'D3 HW_IRQ_EN = 0 Hardware IRQ Enable (Disabled)
EBX-41 Reference Manual
AL, 00h
;SPIDATA1: 00h for outputs
DX, AL
DX, CACh
AL, 00h
;SPIDATA2: MCP23S17 register address 00h
DX, AL
DX, CADh
AL, 40h
;SPIDATA3: MCP23S17 write command
DX, AL
BUSY
;Poll busy flag to wait for SPI transaction
DX, CABh
AL, 55h
;SPIDATA1: data to write
DX, AL
DX, CACh
AL, 14h
;SPIDATA2: MCP23S17 register address 14h
DX, AL
DX, CADh
AL, 40h
;SPIDATA3: MCP23S17 write command
DX, AL
BUSY
;Poll busy flag to wait for SPI transaction
DX, CA9h
AL, DX
;Get SPISTATUS
AL, 01h
;Isolate the BUSY flag
BUSY
;Loop if SPI transaction not complete
= 0 SPI Clock Polarity (SCLK idles low)
= 0 SPI Clock Phase (Data read on rising edge)
= 1 SPI Frame Length (24-Bit)
= 0
"
"
"
= 0 SPI Slave Select Mode (Automatic)
= 1 SPI Slave Select (On-Board DIO 0-15)
= 1
"
"
"
= 0
"
"
"
= 0 IRQ Select (IRQ3)
= 0
"
"
"
= 1 SPI SCLK Frequency (8.333 MHz)
= 1
"
"
"
"
"
"
"
"
"
Interfaces and Connectors
43

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