VersaLogic Copperhead VL-EBX-41 Reference Manual page 60

Bit Mnemonic
D2-D0 SS(2:0)
EBX-41 Reference Manual
Description
SPI Slave Select – These bits select which slave select will be asserted. The
SSx# pin on the baseboard will be directly controlled by these bits when
MAN_SS = 1. There are two sets of definitions which depend on the state of
the ADIOMODE bit in the Miscellaneous Control Register (MISCCON).
ADIOMODE = 0 (default mode)
SS2 SS1 SS0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
ADIOMODE = 1
SS2 SS1 SS0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Interfaces and Connectors
Slave Select
None, port disabled
SPX Slave Select 0, J28 pin-8
SPX Slave Select 1, J28 pin-9
SPX Slave Select 2, J28 pin-10
SPX Slave Select 3, J28 pin-11
A/D Converter Channels 1-8 (on-board U34)
Digital I/O Channels 1-32 (on-board U22,U51)
D/A Converter Channels 1-4 (on-board U26)
Slave Select
Same as for ADIOMODE = 0
SUMIT SPI I/F Chip Select 0, J14 pin-16
SUMIT SPI I/F Chip Select 1, J14 pin-18
A/D Converter Channels 9-16 (on-board U56)
D/A Converter Channels 5-8 (on-board U31)
Same as for ADIOMODE = 0
Same as for ADIOMODE = 0
Same as for ADIOMODE = 0
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