Measurement Computing PCI-DAS6052 User Manual page 30

PCI-DAS6052 User's Guide
Analog In
16 CH S-E or
8 CH DIFF.
A/D CONVERT
A/D START TRIGGER
A/D PACER GATE
A/D PACER OUT
SCANCLK
D/A START TRIGGER
D/A UPDATE
D/A PACER OUT
EXT CTR1 CLK
CTR1 GATE
CTR1 OUT
CTR2 GATE
CTR2 OUT
THRESH-HI
12-BIT
THRESH-LO
12-BIT
Mux
&
Gain
DAC0
16-BIT
DAC1
16-BIT
DIO
0)
DIO (7:
8-BIT
USER
COUNTER
1
USER
COUNTER
2
Figure 4-1. Block Diagram – PCI-DAS6052
HOLDING
REGISTER
ADC
16
D Q
16-BIT
EOC
REF.
STC
CONTROL
CTR1 CLK
82C54
Control
4-4
Queue
ADC
Buffer
Buffer
(8K)
(8K)
MEMORY BUS
40 MHz
SYSTEM
TIMING
&
LOCAL BUS
Boot
EEPROM
PCI BUS (5V, 32-BIT, 33 MHZ)
Functional Details
DAC
Buffer
(16K)