Daq-Sync Signals - Measurement Computing PCI-DAS6052 User Manual

PCI-DAS6052 User's Guide

DAQ-Sync signals

The DAQ-Sync hardware provides the capability of triggering or clocking up to four
slave boards from a master board to synchronize data input and/or output.
The PCI-DAS6052 board provides the capability of inter-board synchronization between
boards in the PCI-DAS6000 family. There are five trigger/strobes and a synchronizing
clock provided on a 14-pin header.
DS A/D START TRIGGER
DS A/D STOP TRIGGER
DS A/D CONVERT
DS D/A UPDATE
DS D/A START TRIGGER
SYNC CLK
Except for the SYNC CLK signal, the DAQ-Sync timing and control signals are a subset
of the AUXIO signals available at the 100-pin I/O connector. These versions of the
signals are used for board-to-board synchronization and have the same timing
specifications as their I/O connector counterparts. Refer to
page 4-5 for explanations of signals and timing.
Use the SYNC CLCK signal to determine the master/slave configuration of a
DAQ-Sync-enabled system. Each system can have one master and up to three slaves.
SYNC CLK is the 40 MHz time-base used to derive all board timing and control. The
master provides this clock to the slave boards so that all boards in the DAQ-sync-
enabled system are timed from the same clock.
Table 4-2 lists the available signals.
Table 4-2. DAQ-Sync Signals
4-3
Functional Details
"DAQ signal timing" on