Nokia 9000i Service Manual page 57

Rae, rak-1 series
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Technical Documentation
Block description
The DSPU communicates with the CTRLU through a mailbox in the D2CA
ASIC. The software for the external memories are loaded through this
mailbox in start up.
The DSP includes two serial buses. One is used for digitized speech
transfer between the DSP and the codec. The other is used as an external
data bus and it is connected to the B2B connector. This bus can be used
for DSP tracing in product development and also as a digital audio
interface (DAI) in audio type approval measurements. The clocks (512
kHz main clock and 8 kHz sync. clock) are generated by the D2CA ASIC.
In transmit mode the DSP codes the speech and routes the resulting
transmit slots to the D2CA. The D2CA ASIC controls timing, and at
specified intervals sends these bits to the RFI for D/A conversion.
In digital receive mode the RFI A/D converts the IF signal from the RF unit
under the control of the D2CA. The DSP controls the D2CA and receives
the converted samples. The received bits are detected from these
samples in DSPU with the aid of some HW accelerators in ASIC. After
channel and speech decoding, the bits are converted into an analog signal
in the PCM codec. The echo cancellation algorithms of the handportable
and Hands–Free modes are also performed in DSPU when needed.
In the case of the data or fax call the DSP performs CRC calculation or
FAX V110 frame encoding/decoding instead of the speech
encoding/decoding. Channel encoding/decoding and demodulation are
performed in DSPU in this case also.
The DSP controls the RF through the D2CA ASIC, where all necessary
timing functions are implemented, and control I/O lines are provided eg.
for synthesizer loading.
The DSP emulator can be connected to DSP pins TCK, TMS, TDO, TDI,
GND and VDD (JTAG standard).
Main components
– AT&T DSP1616–X11
– Two 32k *8 70ns SRAMs for DSP external memory. The SRAM's lo-
cate physically in MCM2.
– 60.2 MHz crystal oscillator to generate differential small signal clock
for the DSP
Original, 08/96
– Digital signal processor with 12kword internal ROM. The
DSP locates physically in MCM2.
RAE/RAK–1N
Baseband
Page 2–31

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