Block Description; Memory Map - Nokia 9000i Service Manual

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Technical Documentation

Block description

– MCU Memories
The MCU has a 20 bits wide address bus A(19:0) and an 16–bit data bus
with memories. The address bits A(19:13) are used for chip select
decoding. The decoding is done inside the SCL in CTRLU submodule.
Hitachi HD6475388 processor has internal ROM and RAM memories.

Memory Map

PAGE ADDRESS
0 00000 INTERNAL ROM
60 Kbytes (16 bit)
0EE7F
0EE80 EXTERNAL ADDRESS
SPACE
0F67F
0F680 INTERNAL RAM
2 Kbyte (16 bit)
0FE7F
0FE80 REGISTER FIELD
384 bytes
0FFFF
1 10000 RAM
64 Kbytes (16 bit)
1FFFF
2 – 11 20000 FLASH
640 Kbytes (16 bit)
BFFFF FA[19:17]=001...101
12 – 13 C0000 FLASH
128 Kbytes (16 bit)
DFFFF FLASH page 0
FA[19:17]=110
14 E0000 SRAM
56 Kbytes (16 bit)
EDFFF
EE000 EEPROM
8 Kbytes (8 bit)
EFFFF
15 F0000 ASIC
F001A 26 bytes (8 bit)
FFFFF
Original, 08/96
Table 26. Memory Map
FPAGE[1:0]= 00
FLASH
128 Kbytes (16 bit)
FLASH page 1
FA[19:17]=111
FPAGE[1:0]=01
FLASH
128 Kbytes (16 bit)
FLASH page 2
FA[19:17]=000
RAE/RAK–1N
Baseband
FPAGE[1:0]=10
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