Silicon Graphics POWER CHALLENGE User Manual page 153

Table E-1 (continued)
Pin Row A
11 GND
12 DS1
13 DS0
14 WRITE*
15 GND
16 DTACK*
17 GND
18 AS*
19 GND
20 IACK*
21 IACKIN*
22 IACKOUT*
23 AM4
24 A07
25 A06
26 A05
27 A04
28 A03
29 A02
30 A01
31 -12V
32 +5V
P1 VME Pin Assignments
Row B
BG3OUT*
BR0*
BR1
BR2*
BR3*
AM0
AM1
AM2
AM3
GND
SERCLK
SERDAT*
GND
IRQ7*
IRQ6*
IRQ5*
IRQ4*
IRQ3*
IRQ2*
IRQ1*
+5VSTDBY
+5V
VME Pins
Row C
BERR*
SYSRESET*
LWORD*
AM5
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A09
A08
+12V
+5V
137