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After a Power-On-Reset the AT-NMI is disabled. By writing to I/O address 70h the
AT-NMI can be enabled or disabled. Bit 7 can not be read.
Bit 7 = 1: AT-NMI disabled
Bit 7 = 0: AT-NMI enabled
The AT-NMI can be triggered by:
a parity error in the main memory
the ISA-bus signal IOCHCK of an expansion card
Bits ENRAM and ENIOCK control the NMI sources via Port B.
After a Power-On-Reset both NMI sources are enabled. Bits ENRAM and ENIOCK
can be read via Port B even if the AT-NMI is disabled. If an enabled parity error or
I/O channel error occurs, the corresponding ENRAM or ENIOCK bit must be dis-
abled and then enabled again to reset the logic.
For the function of the keyboard interface, the controller is programmed to trans-
late the codes received from the keyboard (Scan Codes) into system codes, which
can be interpreted by the BIOS. The keyboard controller receives serial data from
the keyboard, checks parity, translates key codes and sends the data to the system
as data byte into its output buffer. As soon as data is present in the buffer, an inter-
rupt request (IRQ1) is asserted.
Commands can be sent to the keyboard by writing into the buffer. The data byte is
sent to the keyboard as serial data with the uneven parity bit being inserted auto-
matically. All data transmission to the keyboard must be acknowledged. No data
may be sent to the keyboard until the previous byte is acknowledged.
A 765B-compatible SuperCell
(c.f. Lit. [4]) is used as floppy disk controller (FDC). Data is transferred over DMA
channel 2. Interrupts are triggered by IRQ6. Two floppy disk drives (3½ or 5¼ ) are
supported.
Floppy disks must be formatted according to their capacity. Failure
to do so may result in read/write errors.
TM
in the FDC37C92x-Ultra-I/O-controller from S MC
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